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Searched refs:CTX_INCLUDE_AARCH32_REGS (Results 1 – 25 of 78) sorted by relevance

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/rk3399_ARM-atf/include/lib/el3_runtime/
H A Dsimd_ctx.h32 #if CTX_INCLUDE_FPREGS && CTX_INCLUDE_AARCH32_REGS
59 #if CTX_INCLUDE_FPREGS && CTX_INCLUDE_AARCH32_REGS
81 #if CTX_INCLUDE_FPREGS && CTX_INCLUDE_AARCH32_REGS
/rk3399_ARM-atf/plat/mediatek/common/
H A Dcoreboot_config.mk12 CTX_INCLUDE_AARCH32_REGS := 0
H A Dcommon_config.mk12 CTX_INCLUDE_AARCH32_REGS := 0
/rk3399_ARM-atf/plat/arm/board/fvp/
H A Dfvp_cpu_errata.mk13 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dcortex_a320.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dvenom.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Ddionysus.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dcanyon.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dveymont.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dcaddo.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dlsc25_e_core.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dlsc25_p_core.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dc1_nano.S21 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dcortex_a65ae.S22 #if CTX_INCLUDE_AARCH32_REGS
H A Dneoverse_e1.S21 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dcortex_a720_ae.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dneoverse_n3.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Drainier.S20 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dcortex_a520.S23 #if CTX_INCLUDE_AARCH32_REGS == 1
H A Dcortex_a65.S22 #if CTX_INCLUDE_AARCH32_REGS
/rk3399_ARM-atf/plat/mediatek/mt8188/
H A Dplat_config.mk23 CTX_INCLUDE_AARCH32_REGS := 0
/rk3399_ARM-atf/plat/mediatek/mt8189/
H A Dplat_config.mk53 CTX_INCLUDE_AARCH32_REGS := 0
/rk3399_ARM-atf/plat/mediatek/mt8196/
H A Dplat_config.mk26 CTX_INCLUDE_AARCH32_REGS := 0
/rk3399_ARM-atf/bl1/aarch64/
H A Dbl1_context_mgmt.c75 #if CTX_INCLUDE_AARCH32_REGS in bl1_prepare_next_image()
/rk3399_ARM-atf/plat/qemu/common/
H A Dcommon.mk156 CTX_INCLUDE_AARCH32_REGS := 0
157 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)

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