1*c9017cbcSGovindraj Raja/* 2*c9017cbcSGovindraj Raja * Copyright (c) 2026, Arm Limited. All rights reserved. 3*c9017cbcSGovindraj Raja * 4*c9017cbcSGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 5*c9017cbcSGovindraj Raja */ 6*c9017cbcSGovindraj Raja 7*c9017cbcSGovindraj Raja#include <arch.h> 8*c9017cbcSGovindraj Raja#include <asm_macros.S> 9*c9017cbcSGovindraj Raja#include <common/bl_common.h> 10*c9017cbcSGovindraj Raja#include <rosillo.h> 11*c9017cbcSGovindraj Raja#include <cpu_macros.S> 12*c9017cbcSGovindraj Raja#include <plat_macros.S> 13*c9017cbcSGovindraj Raja 14*c9017cbcSGovindraj Raja/* Hardware handled coherency */ 15*c9017cbcSGovindraj Raja#if HW_ASSISTED_COHERENCY == 0 16*c9017cbcSGovindraj Raja#error "Rosillo must be compiled with HW_ASSISTED_COHERENCY enabled" 17*c9017cbcSGovindraj Raja#endif 18*c9017cbcSGovindraj Raja 19*c9017cbcSGovindraj Raja/* 64-bit only core */ 20*c9017cbcSGovindraj Raja#if CTX_INCLUDE_AARCH32_REGS == 1 21*c9017cbcSGovindraj Raja#error "Rosillo supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22*c9017cbcSGovindraj Raja#endif 23*c9017cbcSGovindraj Raja 24*c9017cbcSGovindraj Raja#if ERRATA_SME_POWER_DOWN == 0 25*c9017cbcSGovindraj Raja#error "Rosillo needs ERRATA_SME_POWER_DOWN=1 to powerdown correctly" 26*c9017cbcSGovindraj Raja#endif 27*c9017cbcSGovindraj Raja 28*c9017cbcSGovindraj Rajacpu_reset_prologue rosillo 29*c9017cbcSGovindraj Raja 30*c9017cbcSGovindraj Rajacpu_reset_func_start rosillo 31*c9017cbcSGovindraj Raja /* ---------------------------------------------------- 32*c9017cbcSGovindraj Raja * Disable speculative loads 33*c9017cbcSGovindraj Raja * ---------------------------------------------------- 34*c9017cbcSGovindraj Raja */ 35*c9017cbcSGovindraj Raja msr SSBS, xzr 36*c9017cbcSGovindraj Raja enable_mpmm 37*c9017cbcSGovindraj Rajacpu_reset_func_end rosillo 38*c9017cbcSGovindraj Raja 39*c9017cbcSGovindraj Rajafunc rosillo_core_pwr_dwn 40*c9017cbcSGovindraj Raja /* --------------------------------------------------- 41*c9017cbcSGovindraj Raja * Flip CPU power down bit in power control register. 42*c9017cbcSGovindraj Raja * It will be set on powerdown and cleared on wakeup 43*c9017cbcSGovindraj Raja * --------------------------------------------------- 44*c9017cbcSGovindraj Raja */ 45*c9017cbcSGovindraj Raja sysreg_bit_toggle ROSILLO_IMP_CPUPWRCTLR_EL1, \ 46*c9017cbcSGovindraj Raja ROSILLO_IMP_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT 47*c9017cbcSGovindraj Raja isb 48*c9017cbcSGovindraj Raja signal_pabandon_handled 49*c9017cbcSGovindraj Raja ret 50*c9017cbcSGovindraj Rajaendfunc rosillo_core_pwr_dwn 51*c9017cbcSGovindraj Raja 52*c9017cbcSGovindraj Raja.section .rodata.rosillo_regs, "aS" 53*c9017cbcSGovindraj Rajarosillo_regs: /* The ASCII list of register names to be reported */ 54*c9017cbcSGovindraj Raja .asciz "cpuectlr_el1", "" 55*c9017cbcSGovindraj Raja 56*c9017cbcSGovindraj Rajafunc rosillo_cpu_reg_dump 57*c9017cbcSGovindraj Raja adr x6, rosillo_regs 58*c9017cbcSGovindraj Raja mrs x8, ROSILLO_IMP_CPUECTLR_EL1 59*c9017cbcSGovindraj Raja ret 60*c9017cbcSGovindraj Rajaendfunc rosillo_cpu_reg_dump 61*c9017cbcSGovindraj Raja 62*c9017cbcSGovindraj Rajadeclare_cpu_ops rosillo, ROSILLO_MIDR, \ 63*c9017cbcSGovindraj Raja rosillo_reset_func, \ 64*c9017cbcSGovindraj Raja rosillo_core_pwr_dwn 65