1656500f9SGovindraj Raja/* 2656500f9SGovindraj Raja * Copyright (c) 2025, Arm Limited. All rights reserved. 3656500f9SGovindraj Raja * 4656500f9SGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 5656500f9SGovindraj Raja */ 6656500f9SGovindraj Raja 7656500f9SGovindraj Raja#include <arch.h> 8656500f9SGovindraj Raja#include <asm_macros.S> 9656500f9SGovindraj Raja#include <common/bl_common.h> 10656500f9SGovindraj Raja#include <caddo.h> 11656500f9SGovindraj Raja#include <cpu_macros.S> 12656500f9SGovindraj Raja#include <plat_macros.S> 13656500f9SGovindraj Raja 14656500f9SGovindraj Raja/* Hardware handled coherency */ 15656500f9SGovindraj Raja#if HW_ASSISTED_COHERENCY == 0 16656500f9SGovindraj Raja#error "Caddo must be compiled with HW_ASSISTED_COHERENCY enabled" 17656500f9SGovindraj Raja#endif 18656500f9SGovindraj Raja 19656500f9SGovindraj Raja/* 64-bit only core */ 20656500f9SGovindraj Raja#if CTX_INCLUDE_AARCH32_REGS == 1 21656500f9SGovindraj Raja#error "Caddo supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22656500f9SGovindraj Raja#endif 23656500f9SGovindraj Raja 24656500f9SGovindraj Raja#if ERRATA_SME_POWER_DOWN == 0 25656500f9SGovindraj Raja#error "Caddo needs ERRATA_SME_POWER_DOWN=1 to powerdown correctly" 26656500f9SGovindraj Raja#endif 27656500f9SGovindraj Raja 28656500f9SGovindraj Rajacpu_reset_prologue caddo 29656500f9SGovindraj Raja 30656500f9SGovindraj Rajacpu_reset_func_start caddo 31656500f9SGovindraj Raja /* ---------------------------------------------------- 32656500f9SGovindraj Raja * Disable speculative loads 33656500f9SGovindraj Raja * ---------------------------------------------------- 34656500f9SGovindraj Raja */ 35656500f9SGovindraj Raja msr SSBS, xzr 36*037c7a81SGovindraj Raja enable_mpmm 37656500f9SGovindraj Rajacpu_reset_func_end caddo 38656500f9SGovindraj Raja 39656500f9SGovindraj Rajafunc caddo_core_pwr_dwn 40656500f9SGovindraj Raja /* --------------------------------------------------- 41656500f9SGovindraj Raja * Flip CPU power down bit in power control register. 42656500f9SGovindraj Raja * It will be set on powerdown and cleared on wakeup 43656500f9SGovindraj Raja * --------------------------------------------------- 44656500f9SGovindraj Raja */ 45656500f9SGovindraj Raja sysreg_bit_toggle CADDO_IMP_CPUPWRCTLR_EL1, \ 46656500f9SGovindraj Raja CADDO_IMP_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT 47656500f9SGovindraj Raja isb 48656500f9SGovindraj Raja signal_pabandon_handled 49656500f9SGovindraj Raja ret 50656500f9SGovindraj Rajaendfunc caddo_core_pwr_dwn 51656500f9SGovindraj Raja 52656500f9SGovindraj Raja.section .rodata.caddo_regs, "aS" 53656500f9SGovindraj Rajacaddo_regs: /* The ASCII list of register names to be reported */ 54656500f9SGovindraj Raja .asciz "cpuectlr_el1", "" 55656500f9SGovindraj Raja 56656500f9SGovindraj Rajafunc caddo_cpu_reg_dump 57656500f9SGovindraj Raja adr x6, caddo_regs 58656500f9SGovindraj Raja mrs x8, CADDO_IMP_CPUECTLR_EL1 59656500f9SGovindraj Raja ret 60656500f9SGovindraj Rajaendfunc caddo_cpu_reg_dump 61656500f9SGovindraj Raja 62656500f9SGovindraj Rajadeclare_cpu_ops caddo, CADDO_MIDR, \ 63656500f9SGovindraj Raja caddo_reset_func, \ 64656500f9SGovindraj Raja caddo_core_pwr_dwn 65