1ba6b6949SGovindraj Raja/* 2fded8392SGovindraj Raja * Copyright (c) 2023-2025, Arm Limited. All rights reserved. 3ba6b6949SGovindraj Raja * 4ba6b6949SGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 5ba6b6949SGovindraj Raja */ 6ba6b6949SGovindraj Raja 7ba6b6949SGovindraj Raja#include <arch.h> 8ba6b6949SGovindraj Raja#include <asm_macros.S> 9ba6b6949SGovindraj Raja#include <common/bl_common.h> 10ba6b6949SGovindraj Raja#include <neoverse_n3.h> 11ba6b6949SGovindraj Raja#include <cpu_macros.S> 12ba6b6949SGovindraj Raja#include <plat_macros.S> 13ba6b6949SGovindraj Raja 14ba6b6949SGovindraj Raja/* Hardware handled coherency */ 15ba6b6949SGovindraj Raja#if HW_ASSISTED_COHERENCY == 0 16ba6b6949SGovindraj Raja#error "Neoverse-N3 must be compiled with HW_ASSISTED_COHERENCY enabled" 17ba6b6949SGovindraj Raja#endif 18ba6b6949SGovindraj Raja 19ba6b6949SGovindraj Raja/* 64-bit only core */ 20ba6b6949SGovindraj Raja#if CTX_INCLUDE_AARCH32_REGS == 1 21ba6b6949SGovindraj Raja#error "Neoverse-N3 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22ba6b6949SGovindraj Raja#endif 23ba6b6949SGovindraj Raja 2489dba82dSBoyan Karatotevcpu_reset_prologue neoverse_n3 2589dba82dSBoyan Karatotev 26fded8392SGovindraj Raja.global check_erratum_neoverse_n3_3699563 27fded8392SGovindraj Raja 2889dba82dSBoyan Karatotevadd_erratum_entry neoverse_n3, ERRATUM(3699563), ERRATA_N3_3699563 29fded8392SGovindraj Raja 30fded8392SGovindraj Rajacheck_erratum_ls neoverse_n3, ERRATUM(3699563), CPU_REV(0, 0) 31fded8392SGovindraj Raja 32ba6b6949SGovindraj Rajacpu_reset_func_start neoverse_n3 33ba6b6949SGovindraj Raja /* Disable speculative loads */ 34ba6b6949SGovindraj Raja msr SSBS, xzr 356fbc98b1SYounghyun Park 36*ff90ce41SYounghyun Park#if !NEOVERSE_Nx_EXTERNAL_LLC 37*ff90ce41SYounghyun Park /* ------------------------------------------------------------- 38*ff90ce41SYounghyun Park * Neoverse n3 has that last level cache is external by default. 39*ff90ce41SYounghyun Park * Clear the bit when NEOVERSE_Nx_EXTERNAL_LLC is not enabled. 40*ff90ce41SYounghyun Park * ------------------------------------------------------------- 41*ff90ce41SYounghyun Park */ 42*ff90ce41SYounghyun Park sysreg_bit_clear NEOVERSE_N3_CPUECTLR2_EL1, NEOVERSE_N3_CPUECTLR2_EL1_SW_EXT_LLC_BIT 436fbc98b1SYounghyun Park#endif 44ba6b6949SGovindraj Rajacpu_reset_func_end neoverse_n3 45ba6b6949SGovindraj Raja 46ba6b6949SGovindraj Raja /* ---------------------------------------------------- 47ba6b6949SGovindraj Raja * HW will do the cache maintenance while powering down 48ba6b6949SGovindraj Raja * ---------------------------------------------------- 49ba6b6949SGovindraj Raja */ 50ba6b6949SGovindraj Rajafunc neoverse_n3_core_pwr_dwn 51ba6b6949SGovindraj Raja /* --------------------------------------------------- 52ba6b6949SGovindraj Raja * Enable CPU power down bit in power control register 53ba6b6949SGovindraj Raja * --------------------------------------------------- 54ba6b6949SGovindraj Raja */ 55ba6b6949SGovindraj Raja sysreg_bit_set NEOVERSE_N3_CPUPWRCTLR_EL1, NEOVERSE_N3_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 56ba6b6949SGovindraj Raja isb 57ba6b6949SGovindraj Raja ret 58ba6b6949SGovindraj Rajaendfunc neoverse_n3_core_pwr_dwn 59ba6b6949SGovindraj Raja 60ba6b6949SGovindraj Raja /* --------------------------------------------- 61ba6b6949SGovindraj Raja * This function provides Neoverse-N3 specific 62ba6b6949SGovindraj Raja * register information for crash reporting. 63ba6b6949SGovindraj Raja * It needs to return with x6 pointing to 64ba6b6949SGovindraj Raja * a list of register names in ascii and 65ba6b6949SGovindraj Raja * x8 - x15 having values of registers to be 66ba6b6949SGovindraj Raja * reported. 67ba6b6949SGovindraj Raja * --------------------------------------------- 68ba6b6949SGovindraj Raja */ 69ba6b6949SGovindraj Raja.section .rodata.neoverse_n3_regs, "aS" 70ba6b6949SGovindraj Rajaneoverse_n3_regs: /* The ascii list of register names to be reported */ 71ba6b6949SGovindraj Raja .asciz "cpuectlr_el1", "" 72ba6b6949SGovindraj Raja 73ba6b6949SGovindraj Rajafunc neoverse_n3_cpu_reg_dump 74ba6b6949SGovindraj Raja adr x6, neoverse_n3_regs 75ba6b6949SGovindraj Raja mrs x8, NEOVERSE_N3_CPUECTLR_EL1 76ba6b6949SGovindraj Raja ret 77ba6b6949SGovindraj Rajaendfunc neoverse_n3_cpu_reg_dump 78ba6b6949SGovindraj Raja 79ba6b6949SGovindraj Rajadeclare_cpu_ops neoverse_n3, NEOVERSE_N3_MIDR, \ 80ba6b6949SGovindraj Raja neoverse_n3_reset_func, \ 81ba6b6949SGovindraj Raja neoverse_n3_core_pwr_dwn 82