1*ef988aedSRex-BC Chen# 2*ef988aedSRex-BC Chen# Copyright (c) 2022, MediaTek Inc. All rights reserved. 3*ef988aedSRex-BC Chen# 4*ef988aedSRex-BC Chen# SPDX-License-Identifier: BSD-3-Clause 5*ef988aedSRex-BC Chen# 6*ef988aedSRex-BC Chen 7*ef988aedSRex-BC Chen# indicate the reset vector address can be programmed 8*ef988aedSRex-BC ChenPROGRAMMABLE_RESET_ADDRESS := 1 9*ef988aedSRex-BC ChenCOLD_BOOT_SINGLE_CPU := 1 10*ef988aedSRex-BC Chen# Build flag to include AArch32 registers in cpu context save and restore during 11*ef988aedSRex-BC Chen# world switch. This flag must be set to 0 for AArch64-only platforms. 12*ef988aedSRex-BC ChenCTX_INCLUDE_AARCH32_REGS := 0 13*ef988aedSRex-BC ChenPLAT_XLAT_TABLES_DYNAMIC := 1 14*ef988aedSRex-BC Chen 15*ef988aedSRex-BC ChenVENDOR_EXTEND_PUBEVENT_ENABLE := 1 16