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/optee_os/core/arch/arm/plat-marvell/
H A Dconf.mk5 $(call force,CFG_TEE_CORE_NB_CORE,4)
6 $(call force,CFG_TZDRAM_START,0x04400000)
7 $(call force,CFG_TZDRAM_SIZE,0x00C00000)
8 $(call force,CFG_SHMEM_START,0x05000000)
9 $(call force,CFG_SHMEM_SIZE,0x00400000)
10 $(call force,CFG_TEE_RAM_VA_SIZE,0x00400000)
12 $(call force,CFG_TEE_SDP_MEM_SIZE,0x00400000)
14 $(call force,CFG_8250_UART,y)
19 $(call force,CFG_TEE_CORE_NB_CORE,2)
20 $(call force,CFG_TZDRAM_START,0x04400000)
[all …]
/optee_os/core/arch/riscv/plat-spike/
H A Dconf.mk2 $(call force,CFG_WITH_USER_TA,n)
3 $(call force,CFG_WITH_SOFTWARE_PRNG,y)
4 $(call force,CFG_CORE_FFA,n)
5 $(call force,CFG_CORE_DYN_SHM,n)
6 $(call force,CFG_SECURE_PARTITION,n)
7 $(call force,CFG_PAGED_USER_TA,n)
8 $(call force,CFG_WITH_PAGER,n)
9 $(call force,CFG_TEE_TA_LOG_LEVEL,0)
10 $(call force,CFG_EMBEDDED_TS,n)
11 $(call force,CFG_CORE_ASLR,n)
[all …]
/optee_os/core/arch/arm/plat-ls/
H A Dconf.mk3 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
4 $(call force,CFG_GIC,y)
5 $(call force,CFG_16550_UART,y)
6 $(call force,CFG_LS,y)
8 $(call force,CFG_DRAM0_BASE,0x80000000)
9 $(call force,CFG_TEE_OS_DRAM0_SIZE,0x4000000)
18 $(call force,CFG_TEE_CORE_NB_CORE,1)
19 $(call force,CFG_DRAM0_SIZE,0x40000000)
20 $(call force,CFG_CORE_CLUSTER_SHIFT,2)
27 $(call force,CFG_TEE_CORE_NB_CORE,4)
[all …]
/optee_os/core/drivers/crypto/caam/
H A Dcrypto.mk35 $(call force, CFG_CAAM_BIG_ENDIAN,y)
36 $(call force, CFG_JR_BLOCK_SIZE,0x10000)
37 $(call force, CFG_JR_INDEX,2)
38 $(call force, CFG_JR_INT,105)
39 $(call force, CFG_CAAM_SGT_ALIGN,4)
40 $(call force, CFG_CAAM_64BIT,y)
41 $(call force, CFG_NXP_CAAM_SGT_V1,y)
42 $(call force, CFG_CAAM_ITR,n)
45 $(call force, CFG_CAAM_LITTLE_ENDIAN,y)
46 $(call force, CFG_JR_BLOCK_SIZE,0x10000)
[all …]
/optee_os/core/lib/scmi-server/
H A Dconf-optee-fvp.mk1 $(call force,CFG_SCPFW_MOD_CLOCK,y)
2 $(call force,CFG_SCPFW_MOD_DVFS,y)
3 $(call force,CFG_SCPFW_MOD_MSG_SMT,y)
4 $(call force,CFG_SCPFW_MOD_MOCK_CLOCK,y)
5 $(call force,CFG_SCPFW_MOD_MOCK_PPU,y)
6 $(call force,CFG_SCPFW_MOD_MOCK_PSU,y)
7 $(call force,CFG_SCPFW_MOD_OPTEE_MBX,y)
8 $(call force,CFG_SCPFW_MOD_POWER_DOMAIN,y)
9 $(call force,CFG_SCPFW_MOD_PSU,y)
10 $(call force,CFG_SCPFW_MOD_REG_SENSOR,y)
[all …]
H A Dconf-optee-stm32mp1.mk1 $(call force,CFG_SCPFW_MOD_CLOCK,y)
2 $(call force,CFG_SCPFW_MOD_OPTEE_CLOCK,y)
3 $(call force,CFG_SCPFW_MOD_OPTEE_CONSOLE,y)
4 $(call force,CFG_SCPFW_MOD_OPTEE_MBX,y)
5 $(call force,CFG_SCPFW_MOD_OPTEE_RESET,y)
6 $(call force,CFG_SCPFW_MOD_RESET_DOMAIN,y)
8 $(call force,CFG_SCPFW_MOD_OPTEE_SMT,y)
10 $(call force,CFG_SCPFW_MOD_MSG_SMT,y)
12 $(call force,CFG_SCPFW_MOD_SCMI,y)
13 $(call force,CFG_SCPFW_MOD_SCMI_CLOCK,y)
[all …]
H A Dconf-optee-stm32mp2.mk1 $(call force,CFG_SCPFW_MOD_CLOCK,y)
2 $(call force,CFG_SCPFW_MOD_MSG_SMT,y)
3 $(call force,CFG_SCPFW_MOD_OPTEE_CLOCK,y)
4 $(call force,CFG_SCPFW_MOD_OPTEE_CONSOLE,y)
5 $(call force,CFG_SCPFW_MOD_OPTEE_MBX,y)
6 $(call force,CFG_SCPFW_MOD_OPTEE_RESET,y)
7 $(call force,CFG_SCPFW_MOD_RESET_DOMAIN,y)
8 $(call force,CFG_SCPFW_MOD_SCMI,y)
9 $(call force,CFG_SCPFW_MOD_SCMI_CLOCK,y)
10 $(call force,CFG_SCPFW_MOD_SCMI_RESET_DOMAIN,y)
[all …]
/optee_os/core/arch/arm/plat-mediatek/
H A Dconf.mk7 $(call force,CFG_8250_UART,y)
8 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
9 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
23 $(call force,CFG_TEE_CORE_NB_CORE,4)
24 $(call force,CFG_CORE_CLUSTER_SHIFT,1)
32 $(call force,CFG_TEE_CORE_NB_CORE,4)
33 $(call force,CFG_CORE_CLUSTER_SHIFT,2)
34 $(call force,CFG_ARM_GICV3,y)
35 $(call force,CFG_GIC,y)
43 $(call force,CFG_TEE_CORE_NB_CORE,4)
[all …]
/optee_os/core/arch/arm/plat-imx/
H A Dconf.mk106 $(call force,CFG_MX6,y)
107 $(call force,CFG_MX6UL,y)
108 $(call force,CFG_TEE_CORE_NB_CORE,1)
109 $(call force,CFG_TZC380,y)
112 $(call force,CFG_MX6,y)
113 $(call force,CFG_MX6ULL,y)
114 $(call force,CFG_TEE_CORE_NB_CORE,1)
115 $(call force,CFG_TZC380,y)
116 $(call force,CFG_IMX_CAAM,n)
117 $(call force,CFG_NXP_CAAM,n)
[all …]
/optee_os/core/arch/arm/plat-stm32mp2/
H A Dconf.mk25 $(call force,CFG_STM32MP21,y)
28 $(call force,CFG_STM32MP23,y)
31 $(call force,CFG_STM32MP25,y)
39 $(call force,CFG_STM32MP23,n)
40 $(call force,CFG_STM32MP25,n)
42 $(call force,CFG_STM32MP21,n)
43 $(call force,CFG_STM32MP25,n)
45 $(call force,CFG_STM32MP21,n)
46 $(call force,CFG_STM32MP23,n)
47 $(call force,CFG_STM32MP25,y)
[all …]
/optee_os/core/arch/arm/plat-sam/
H A Dconf.mk20 $(call force,CFG_SAMA7G5,y)
21 $(call force,CFG_GIC,y)
22 $(call force,CFG_TZC400,y)
23 $(call force,CFG_MICROCHIP_PIT,y)
24 $(call force,CFG_SCMI_MSG_RESET_DOMAIN,y)
27 $(call force,CFG_SAMA5D2,y)
28 $(call force,CFG_ATMEL_SAIC,y)
29 $(call force,CFG_PL310,y)
30 $(call force,CFG_PL310_SIP_PROTOCOL,y)
33 $(call force,CFG_TEE_CORE_NB_CORE,1)
[all …]
/optee_os/core/arch/riscv/plat-sifive/
H A Dconf.mk1 $(call force,CFG_RV64_core,y)
4 $(call force,CFG_RISCV_ISA_C,y)
5 $(call force,CFG_RISCV_FPU,y)
7 $(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
8 $(call force,CFG_CORE_RESERVED_SHM,n)
9 $(call force,CFG_CORE_DYN_SHM,y)
14 $(call force,CFG_WITH_SOFTWARE_PRNG,y)
17 $(call force,CFG_CORE_SANITIZE_KADDRESS,n)
20 $(call force,CFG_TEE_CORE_NB_CORE,4)
22 $(call force,CFG_BOOT_SYNC_CPU,n)
[all …]
/optee_os/core/arch/arm/plat-versal2/
H A Dconf.mk14 $(call force,CFG_CRYPTO_SM2_PKE,n)
15 $(call force,CFG_CRYPTO_SM2_DSA,n)
16 $(call force,CFG_CRYPTO_SM2_KEP,n)
17 $(call force,CFG_CRYPTO_SM3,n)
18 $(call force,CFG_CRYPTO_SM4,n)
21 $(call force,CFG_WITH_PAGER,n)
24 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
25 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
26 $(call force,CFG_TEE_CORE_NB_CORE,8)
27 $(call force,CFG_ARM_GICV3,y)
[all …]
/optee_os/core/arch/arm/plat-rcar/
H A Dconf.mk5 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
6 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
7 $(call force,CFG_SCIF,y)
8 $(call force,CFG_GIC,y)
9 $(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
10 $(call force,CFG_CORE_ARM64_PA_BITS,36)
11 $(call force,CFG_TEE_CORE_NB_CORE,8)
12 $(call force,CFG_ARM64_core,y)
13 $(call force,CFG_WITH_LPAE,y)
16 $(call force,CFG_RCAR_GEN4, y)
[all …]
/optee_os/core/arch/riscv/plat-virt/
H A Dconf.mk1 $(call force,CFG_RV64_core,y)
4 $(call force,CFG_RISCV_ISA_C,y)
5 $(call force,CFG_RISCV_FPU,y)
7 $(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
8 $(call force,CFG_CORE_RESERVED_SHM,n)
9 $(call force,CFG_CORE_DYN_SHM,y)
14 $(call force,CFG_WITH_SOFTWARE_PRNG,n)
15 $(call force,CFG_HWRNG_PTA,y)
16 $(call force,CFG_HWRNG_QUALITY,1024)
17 $(call force,CFG_RISCV_ZKR_RNG,y)
[all …]
/optee_os/core/arch/arm/plat-stm32mp1/
H A Dconf.mk73 $(call force,CFG_STM32_CRYP,n)
74 $(call force,CFG_STM32_SAES,n)
78 $(call force,CFG_HWRNG_PTA,n)
79 $(call force,CFG_WITH_SOFTWARE_PRNG,y)
88 $(call force,CFG_STM32MP13,y)
92 $(call force,CFG_STM32MP15,y)
103 $(call force,CFG_STM32MP15,n)
105 $(call force,CFG_STM32MP15,y)
106 $(call force,CFG_STM32MP13,n)
108 ifeq ($(call cfg-one-enabled,CFG_STM32MP15 CFG_STM32MP13),n)
[all …]
/optee_os/core/arch/arm/plat-bcm/
H A Dconf.mk5 $(call force,CFG_8250_UART,y)
6 $(call force,CFG_TEE_CORE_DEBUG,n)
7 $(call force,CFG_GIC,y)
9 $(call force,CFG_WITH_LPAE,y)
10 $(call force,CFG_ARM_GICV3,y)
11 $(call force,CFG_CORE_CLUSTER_SHIFT,1)
12 $(call force,CFG_TEE_CORE_NB_CORE,8)
13 $(call force,CFG_CORE_ARM64_PA_BITS,48)
20 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
21 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
[all …]
/optee_os/core/arch/arm/plat-k3/
H A Dconf.mk23 $(call force,CFG_TEE_CORE_NB_CORE,8)
24 $(call force,CFG_8250_UART,y)
25 $(call force,CFG_HWSUPP_MEM_PERM_PXN,y)
26 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
27 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
28 $(call force,CFG_GIC,y)
29 $(call force,CFG_ARM_GICV3,y)
30 $(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
31 $(call force,CFG_K3_OTP_KEYWRITING,y)
32 $(call force,CFG_CORE_ARM64_PA_BITS,36)
[all …]
/optee_os/core/arch/arm/plat-ti/
H A Dconf.mk8 $(call force,CFG_TEE_CORE_NB_CORE,2)
10 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
15 $(call force,CFG_TEE_CORE_NB_CORE,2)
17 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
22 $(call force, CFG_TEE_CORE_NB_CORE,1)
24 $(call force,CFG_NO_SMP,y)
25 $(call force,CFG_PL310,y)
26 $(call force,CFG_PL310_LOCKED,y)
27 $(call force,CFG_PM_ARM32,y)
28 $(call force,CFG_SECURE_TIME_SOURCE_REE,y)
[all …]
/optee_os/core/arch/arm/plat-aspeed/
H A Dconf.mk6 $(call force,CFG_8250_UART,y)
7 $(call force,CFG_ARM32_core,y)
8 $(call force,CFG_TEE_CORE_NB_CORE,2)
9 $(call force,CFG_GIC,y)
10 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
26 $(call force,CFG_8250_UART,y)
27 $(call force,CFG_ARM64_core,y)
28 $(call force,CFG_TEE_CORE_NB_CORE,4)
29 $(call force,CFG_ARM_GICV3,y)
30 $(call force,CFG_GIC,y)
[all …]
/optee_os/core/arch/arm/plat-qcom/
H A Dconf.mk5 $(call force,CFG_GIC,y)
6 $(call force,CFG_ARM_GICV3,y)
7 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
8 $(call force,CFG_ARM64_core,y)
9 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
10 $(call force,CFG_CORE_ARM64_PA_BITS,40)
11 $(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
12 $(call force,CFG_CORE_RESERVED_SHM,n)
13 $(call force,CFG_QCOM_GENI_UART,y)
20 $(call force,CFG_TEE_CORE_NB_CORE,8)
[all …]
/optee_os/core/arch/arm/plat-rzn1/
H A Dconf.mk5 $(call force,CFG_ARM32_core,y)
6 $(call force,CFG_TEE_CORE_NB_CORE,2)
7 $(call force,CFG_BOOT_SECONDARY_REQUEST,y)
8 $(call force,CFG_SECONDARY_INIT_CNTFRQ,y)
9 $(call force,CFG_PSCI_ARM32,y)
10 $(call force,CFG_16550_UART,y)
11 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
12 $(call force,CFG_WITH_PAGER,n)
13 $(call force,CFG_GIC,y)
14 $(call force,CFG_SM_PLATFORM_HANDLER,y)
[all …]
/optee_os/core/arch/arm/plat-corstone1000/
H A Dconf.mk7 $(call force,CFG_WITH_LPAE,y)
8 $(call force,CFG_PSCI_ARM64,y)
9 $(call force,CFG_DT,y)
10 $(call force,CFG_EXTERNAL_DTB_OVERLAY,y)
12 $(call force,CFG_CORE_SEL1_SPMC,y)
13 $(call force,CFG_CORE_FFA,y)
14 $(call force,CFG_SECURE_PARTITION,y)
16 $(call force,CFG_GIC,y)
17 $(call force,CFG_PL011,y)
18 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
[all …]
/optee_os/core/
H A Dcrypto.mk96 $(eval $(call cryp-enable-all-depends,CFG_WITH_SOFTWARE_PRNG, AES ECB SHA256))
99 $(call force,CFG_CRYPTO_WITH_CE,y,required with CFG_CRYPTO_WITH_CE82)
102 CFG_CRYPTO_SHA3_ARM_CE ?= $(call cfg-one-enabled, CFG_CRYPTO_SHA3_224 \
117 $(call force,CFG_AES_GCM_TABLE_BASED,n,conflicts with CFG_CRYPTO_WITH_CE)
145 $(call force,CFG_WITH_VFP,y,required by CFG_CRYPTO_SHA256_ARM32_CE)
148 $(call force,CFG_WITH_VFP,y,required by CFG_CRYPTO_SHA256_ARM64_CE)
151 $(call force,CFG_WITH_VFP,y,required by CFG_CRYPTO_SHA1_ARM_CE)
154 $(call force,CFG_WITH_VFP,y,required by CFG_CRYPTO_AES_ARM_CE)
157 $(call force,CFG_WITH_VFP,y,required by CFG_CORE_CRYPTO_SM4_ACCEL)
159 cryp-enable-all-depends = $(call cfg-enable-all-depends,$(strip $(1)),$(foreach v,$(2),CFG_CRYPTO_$…
[all …]
/optee_os/core/arch/arm/plat-versal/
H A Dconf.mk7 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
8 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
9 $(call force,CFG_TEE_CORE_NB_CORE,2)
10 $(call force,CFG_ARM_GICV3,y)
11 $(call force,CFG_PL011,y)
12 $(call force,CFG_GIC,y)
19 $(call force,CFG_CORE_ASLR,n)
32 $(call force,CFG_CORE_ARM64_PA_BITS,43)
34 $(call force,CFG_ARM32_core,y)
44 $(call force, CFG_VERSAL_MBOX,y)
[all …]

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