| #
799f2000 |
| 23-Jun-2023 |
Andrew Davis <afd@ti.com> |
core: console: Allow setting logging verbosity during runtime
The default console can be disabled at runtime for power management. Any prints after boot from OP-TEE could cause a bus data abort if t
core: console: Allow setting logging verbosity during runtime
The default console can be disabled at runtime for power management. Any prints after boot from OP-TEE could cause a bus data abort if the UART has been disabled. Add an option to change the log level after boot has completed which can be used to disable the console log.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
a9690ae3 |
| 01-Aug-2025 |
T Pratham <t-pratham@ti.com> |
plat-k3: drivers: Add TRNG driver support in AM62L
AM62L contains the EIP76D TRNG IP which was also present in the previous K3 devices inside the SA2UL accelerator, so the same driver is being re-us
plat-k3: drivers: Add TRNG driver support in AM62L
AM62L contains the EIP76D TRNG IP which was also present in the previous K3 devices inside the SA2UL accelerator, so the same driver is being re-used here. But the AM62L does not have SA2UL. The SoC specific configurations are being set here for AM62L for enabling TRNG.
Signed-off-by: T Pratham <t-pratham@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
5b6c7df7 |
| 20-Jun-2025 |
T Pratham <t-pratham@ti.com> |
plat-k3: drivers: Refactor SA2UL driver
The EIP76D TRNG IP being used in current K3 devices is not unique to SA2UL/SA3UL. The RNG driver can be reused in other devices containing the same TRNG IP ou
plat-k3: drivers: Refactor SA2UL driver
The EIP76D TRNG IP being used in current K3 devices is not unique to SA2UL/SA3UL. The RNG driver can be reused in other devices containing the same TRNG IP outside of SA2UL/SA3UL.
Refactor the SA2UL and RNG driver to make EIP76D TRNG driver independent of SA2UL.
Signed-off-by: T Pratham <t-pratham@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
ef1ebdc2 |
| 01-Oct-2024 |
Vignesh Raghavendra <vigneshr@ti.com> |
plat-k3: Add initial support for AM62Lx SoC
AM62Lx newest among on the K3 class of SoCs designed to be low footprint system where DDR can be as small as 128M. Hence, move the DDR location to the beg
plat-k3: Add initial support for AM62Lx SoC
AM62Lx newest among on the K3 class of SoCs designed to be low footprint system where DDR can be as small as 128M. Hence, move the DDR location to the beginning of DDR right after TF-A.
Disable TI SCI, secure boot info and HW unique ID support for now, they will be incrementally at later point in time as the underlying communication layer is different than AM62x.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Dhruva Gole <d-gole@ti.com>
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| #
35c75f35 |
| 08-Feb-2024 |
Andrew Davis <afd@ti.com> |
plat-k3: disable PRNG by default for all K3
All K3 devices already have PRNG disabled, remove the check and set this unconditionally.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Foris
plat-k3: disable PRNG by default for all K3
All K3 devices already have PRNG disabled, remove the check and set this unconditionally.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
9240925f |
| 24-Aug-2023 |
Andrew Davis <afd@ti.com> |
plat-k3: Default to 2 core per cluster only for AM65x
All other SoCs have 4 cores per cluster, which is the default, or they only have one cluster in which case this value is unimportant.
Signed-of
plat-k3: Default to 2 core per cluster only for AM65x
All other SoCs have 4 cores per cluster, which is the default, or they only have one cluster in which case this value is unimportant.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
a9920e6c |
| 13-Oct-2022 |
Manorit Chawdhry <m-chawdhry@ti.com> |
plat-k3: add config for building extended OTP PTA
Add the config to build it for K3 platforms. It is still an optional support and can be disabled if necessary.
Signed-off-by: Manorit Chawdhry <m-c
plat-k3: add config for building extended OTP PTA
Add the config to build it for K3 platforms. It is still an optional support and can be disabled if necessary.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
d6c5d003 |
| 20-Oct-2022 |
Kamlesh Gurudasani <kamlesh@ti.com> |
plat-k3: am62x: add SA2UL and TRNG support
Add SA2UL and TRNG support for TI SoC AM62X through OP-TEE.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Acked-by: Jerome Forissier <jerome.forissie
plat-k3: am62x: add SA2UL and TRNG support
Add SA2UL and TRNG support for TI SoC AM62X through OP-TEE.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
e48bcda2 |
| 06-Oct-2022 |
Jayesh Choudhary <j-choudhary@ti.com> |
plat-k3: Add support for j784s4 platform
Add SA2UL and TRNG support for TI SoC J784S4 through OP-TEE.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Acked-by: Andrew Davis <afd@ti.com> Acked-
plat-k3: Add support for j784s4 platform
Add SA2UL and TRNG support for TI SoC J784S4 through OP-TEE.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Acked-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> [jf: wrap line >80 characters] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
0a4589e6 |
| 18-Aug-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: Add high DDR memory region
K3 devices support more than 2GB of DRAM, the extra is placed at a highmem address of 0x880000000. If memory from this area is passed to OP-TEE one will get the f
plat-k3: Add high DDR memory region
K3 devices support more than 2GB of DRAM, the extra is placed at a highmem address of 0x880000000. If memory from this area is passed to OP-TEE one will get the following error:
E/TC:1 0 std_entry_with_parg:235 Bad arg address 0x881585000
Add the highmem area to fix this.
Fixes: dfd994436ac3 ("plat-k3: Add DDR setup in k3 platform") Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
25717bda |
| 17-Aug-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: Enable ARMv8 Crypto Extensions support by default
All of the currently supported K3 platforms support ARM CE, enable this by default so it does not have to be enabled in the build command.
plat-k3: Enable ARMv8 Crypto Extensions support by default
All of the currently supported K3 platforms support ARM CE, enable this by default so it does not have to be enabled in the build command.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
a148e700 |
| 17-Aug-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: drivers: Reverse RNG disabling logic
We want to be able to disable SA2UL from the command line and only be able to enable it for supported platforms. Right now we force it on for supported
plat-k3: drivers: Reverse RNG disabling logic
We want to be able to disable SA2UL from the command line and only be able to enable it for supported platforms. Right now we force it on for supported platforms and allow it to be enabled still on unsupported ones. Reverse this.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
69e8ed5e |
| 28-Jun-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: drivers: Disable SA2UL RNG driver on unsupported flavors
Only enable the SA2UL TRNG on platform flavors that are currently supported. This can be relaxed for platforms as support is verifie
plat-k3: drivers: Disable SA2UL RNG driver on unsupported flavors
Only enable the SA2UL TRNG on platform flavors that are currently supported. This can be relaxed for platforms as support is verified.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
bf9dfcc2 |
| 03-May-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: drivers: Add SA2UL RNG driver
TI K3 family devices contain a set of crypto accelerators under the umbrella device SA2UL. Add support for setting up the power and firewalls for this device.
plat-k3: drivers: Add SA2UL RNG driver
TI K3 family devices contain a set of crypto accelerators under the umbrella device SA2UL. Add support for setting up the power and firewalls for this device. Then add support for the TRNG sub-device.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
bc14a5cc |
| 16-May-2022 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm.mk: set CFG_ARM32_core=y when CFG_ARM34_core != y
Updates core/arch/arm/arm.mk to assume 32-bit mode when not 64-bit and simplify the platforms conf.mk accordingly.
Signed-off-by: Jerome
core: arm.mk: set CFG_ARM32_core=y when CFG_ARM34_core != y
Updates core/arch/arm/arm.mk to assume 32-bit mode when not 64-bit and simplify the platforms conf.mk accordingly.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
aeb2ac09 |
| 16-May-2022 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y
Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the common file core/arch/arm/arm.mk instead of leaving it to the platfo
core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y
Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the common file core/arch/arm/arm.mk instead of leaving it to the platforms.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
7f756666 |
| 05-May-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: Disable SECURE_DATA_PATH until xtest is fixed
While SDP support is being re-worked disable support by default to prevent failing test cases. This will be re-enabled when the REE-side suppor
plat-k3: Disable SECURE_DATA_PATH until xtest is fixed
While SDP support is being re-worked disable support by default to prevent failing test cases. This will be re-enabled when the REE-side support is restored.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
f3721740 |
| 23-Jul-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove the unused PM stubs
Removes the PM stubs and all references to CFG_PM_STUBS.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.o
core: remove the unused PM stubs
Removes the PM stubs and all references to CFG_PM_STUBS.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
35e770df |
| 04-Jun-2020 |
Jerome Forissier <jerome@forissier.org> |
Move CFG_WITH_STACK_CANARIES to global config file
All platforms but one (bcm-ns3) set CFG_WITH_STACK_CANARIES ?= y in their configuration files. Move this flag to the global mk/config.mk instead. N
Move CFG_WITH_STACK_CANARIES to global config file
All platforms but one (bcm-ns3) set CFG_WITH_STACK_CANARIES ?= y in their configuration files. Move this flag to the global mk/config.mk instead. Not sure it matters much, but in order to avoid any functional change, CFG_WITH_STACK_CANARIES ?= n is added to plat-bcm/conf.mk.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
0146c7ad |
| 07-Jun-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make generic boot mandatory
The OP-TEE booting has since quite some time been unified in the sense that all platforms use CFG_GENERIC_BOOT=y. Make this configuration option mandatory and remov
core: make generic boot mandatory
The OP-TEE booting has since quite some time been unified in the sense that all platforms use CFG_GENERIC_BOOT=y. Make this configuration option mandatory and remove the CFG_GENERIC_BOOT flag.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
05beeff0 |
| 20-May-2020 |
Jan Kiszka <jan.kiszka@siemens.com> |
plat-k3: Make UART number configurable via CFG_CONSOLE_UART
This is analogous to plat-hikey and allows to select a different console UART for the k3 platform as well during build. This is needed to
plat-k3: Make UART number configurable via CFG_CONSOLE_UART
This is analogous to plat-hikey and allows to select a different console UART for the k3 platform as well during build. This is needed to enable support for the IOT2050 device which uses the second UART.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Andrew F. Davis <afd@ti.com>
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| #
9f1eec75 |
| 17-Dec-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
Factor out ta-targets from platform config
Platforms use the same basic pattern again and again:
ta-targets = ta_arm32 ifeq ($(CFG_ARM64_core),y) ta-targets += ta_arm64 endif
Let's move this p
Factor out ta-targets from platform config
Platforms use the same basic pattern again and again:
ta-targets = ta_arm32 ifeq ($(CFG_ARM64_core),y) ta-targets += ta_arm64 endif
Let's move this pattern to core/arch/arm/arm.mk, make it the default, and cleanup the platform configuration files.
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
940a2437 |
| 14-Nov-2016 |
Andrew F. Davis <afd@ti.com> |
Add new platform for the TI K3 class of SoCs
Add platform 'k3' for the TI K3 family. These are ARMv8 devices and are quite different from our line of existing ARMv7 OMAP style SoCs, hence the new pl
Add new platform for the TI K3 class of SoCs
Add platform 'k3' for the TI K3 family. These are ARMv8 devices and are quite different from our line of existing ARMv7 OMAP style SoCs, hence the new platform.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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