| #
1677a7fb |
| 18-Jun-2024 |
Gavin Liu <gavin.liu@mediatek.com> |
plat-mediatek: add support to extend MAX_XLAT_TABLE
When using the reserved virtual memory space, it is necessary to increase MAX_XLAT_TABLE based on its size.
Signed-off-by: Gavin Liu <gavin.liu@m
plat-mediatek: add support to extend MAX_XLAT_TABLE
When using the reserved virtual memory space, it is necessary to increase MAX_XLAT_TABLE based on its size.
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
9ed8348b |
| 25-May-2024 |
Charles Herz <herzc@umich.edu> |
core: plat-mediatek: fix enforcement of SWRNG configuration on MT7988
Small fix: $(call force,CFG_WITH_SOFTWARE_PRNG,Y) should be lowercase 'y' so that the conditional check in core/crypto/sub.mk in
core: plat-mediatek: fix enforcement of SWRNG configuration on MT7988
Small fix: $(call force,CFG_WITH_SOFTWARE_PRNG,Y) should be lowercase 'y' so that the conditional check in core/crypto/sub.mk includes the correct source file rng_fortuna.c instead of rng_hw.c, which is unimplemented for this platform and causes build failure.
Fixes: 58dbe3dff530 ("plat-mediatek: add support for MT7988 SoC") Signed-off-by: Charles Herz <herzc@umich.edu> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
58dbe3df |
| 22-Feb-2024 |
guan-gm.lin <guan-gm.lin@mediatek.com> |
plat-mediatek: add support for MT7988 SoC
Add OP-TEE support for the MT7988 SoC.
Signed-off-by: guan-gm.lin <guan-gm.lin@mediatek.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by:
plat-mediatek: add support for MT7988 SoC
Add OP-TEE support for the MT7988 SoC.
Signed-off-by: guan-gm.lin <guan-gm.lin@mediatek.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
ace93cc7 |
| 17-Jul-2023 |
Gavin Liu <gavin.liu@mediatek.com> |
plat-mediatek: add support for MT8188 SoC
Add OP-TEE support for the MT8188 SoC.
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
85015631 |
| 08-Sep-2021 |
Fabien Parent <fparent@baylibre.com> |
plat-mediatek: add support for MT8195 SoC
Add OP-TEE support for the MT8195 SoC.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed
plat-mediatek: add support for MT8195 SoC
Add OP-TEE support for the MT8195 SoC.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
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| #
bc14a5cc |
| 16-May-2022 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm.mk: set CFG_ARM32_core=y when CFG_ARM34_core != y
Updates core/arch/arm/arm.mk to assume 32-bit mode when not 64-bit and simplify the platforms conf.mk accordingly.
Signed-off-by: Jerome
core: arm.mk: set CFG_ARM32_core=y when CFG_ARM34_core != y
Updates core/arch/arm/arm.mk to assume 32-bit mode when not 64-bit and simplify the platforms conf.mk accordingly.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
aeb2ac09 |
| 16-May-2022 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y
Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the common file core/arch/arm/arm.mk instead of leaving it to the platfo
core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y
Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the common file core/arch/arm/arm.mk instead of leaving it to the platforms.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
33b9b4b9 |
| 19-Nov-2021 |
Julien Masson <jmasson@baylibre.com> |
plat-mediatek: set SHMEM base address after TZDRAM
In order to avoid hole between TZDRAM and SHMEM memory, the Non-secure static shared memory physical base address is set by default just after the
plat-mediatek: set SHMEM base address after TZDRAM
In order to avoid hole between TZDRAM and SHMEM memory, the Non-secure static shared memory physical base address is set by default just after the secure RAM (TZDRAM): SHMEM_START = TZDRAM_START + TZDRAM_SIZE
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Julien Masson <jmasson@baylibre.com>
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| #
292b3186 |
| 19-Nov-2021 |
Julien Masson <jmasson@baylibre.com> |
plat-mediatek: define memory range
This patch registers the non-secure memory to support dynamic shm registering.
The default RAM size has been set to 1 GiB and default RAM base address set to 0x40
plat-mediatek: define memory range
This patch registers the non-secure memory to support dynamic shm registering.
The default RAM size has been set to 1 GiB and default RAM base address set to 0x40000000. These values can be changed at compilation via CFG_DRAM_SIZE and CFG_DRAM_BASE.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Julien Masson <jmasson@baylibre.com>
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| #
4451b84e |
| 17-Feb-2021 |
Fabien Parent <fparent@baylibre.com> |
plat-mediatek: add support for MT8175 SoC
Add OP-TEE support for MT8175 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
d53c0183 |
| 05-Jul-2019 |
Fabien Parent <fparent@baylibre.com> |
plat-mediatek: add support for MT8183 SoC
Add OP-TEE support for MT8183 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
ade61fec |
| 24-Feb-2019 |
Fabien Parent <fparent@baylibre.com> |
mediatek: add support for MT8516 SoC
Add OP-TEE support for MT8516 SoC.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Fabien Parent <fparent@baylibre.com>
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| #
bdb6a6af |
| 19-Oct-2020 |
Fabien Parent <fparent@baylibre.com> |
mediatek: enable CFG_ARM64_core by default
MediaTek platforms are most likely going to be built using ARM64, so set the default value for CFG_ARM64_core to be 'y'.
Suggested-by: Jerome Forissier <j
mediatek: enable CFG_ARM64_core by default
MediaTek platforms are most likely going to be built using ARM64, so set the default value for CFG_ARM64_core to be 'y'.
Suggested-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| #
f3721740 |
| 23-Jul-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove the unused PM stubs
Removes the PM stubs and all references to CFG_PM_STUBS.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.o
core: remove the unused PM stubs
Removes the PM stubs and all references to CFG_PM_STUBS.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
35e770df |
| 04-Jun-2020 |
Jerome Forissier <jerome@forissier.org> |
Move CFG_WITH_STACK_CANARIES to global config file
All platforms but one (bcm-ns3) set CFG_WITH_STACK_CANARIES ?= y in their configuration files. Move this flag to the global mk/config.mk instead. N
Move CFG_WITH_STACK_CANARIES to global config file
All platforms but one (bcm-ns3) set CFG_WITH_STACK_CANARIES ?= y in their configuration files. Move this flag to the global mk/config.mk instead. Not sure it matters much, but in order to avoid any functional change, CFG_WITH_STACK_CANARIES ?= n is added to plat-bcm/conf.mk.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
0146c7ad |
| 07-Jun-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make generic boot mandatory
The OP-TEE booting has since quite some time been unified in the sense that all platforms use CFG_GENERIC_BOOT=y. Make this configuration option mandatory and remov
core: make generic boot mandatory
The OP-TEE booting has since quite some time been unified in the sense that all platforms use CFG_GENERIC_BOOT=y. Make this configuration option mandatory and remove the CFG_GENERIC_BOOT flag.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
9f1eec75 |
| 17-Dec-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
Factor out ta-targets from platform config
Platforms use the same basic pattern again and again:
ta-targets = ta_arm32 ifeq ($(CFG_ARM64_core),y) ta-targets += ta_arm64 endif
Let's move this p
Factor out ta-targets from platform config
Platforms use the same basic pattern again and again:
ta-targets = ta_arm32 ifeq ($(CFG_ARM64_core),y) ta-targets += ta_arm64 endif
Let's move this pattern to core/arch/arm/arm.mk, make it the default, and cleanup the platform configuration files.
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
9460285e |
| 04-Jun-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
plat-*/conf.mk: use $(call force, ...) to set CFG_TEE_CORE_NB_CORE
Except for very special cases (such as virtualization), the number of CPU cores that can enter OP-TEE is a fixed number that depend
plat-*/conf.mk: use $(call force, ...) to set CFG_TEE_CORE_NB_CORE
Except for very special cases (such as virtualization), the number of CPU cores that can enter OP-TEE is a fixed number that depends on the hardware configuration and should not be configurable at build time. Therefore, use $(call force,CFG_TEE_CORE_NB_CORE,<value>) to set the value.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
4d34aff4 |
| 15-May-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-mediatek: support generic RAM layout
Move default secure and non-secure Optee memory locations from platform_config.h to conf.mk using the generic_ram_layout.
Signed-off-by: Etienne Carriere <
plat-mediatek: support generic RAM layout
Move default secure and non-secure Optee memory locations from platform_config.h to conf.mk using the generic_ram_layout.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org>
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| #
29e7629e |
| 03-May-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: move CFG_TEE_CORE_NB_CORE to conf.mk for various platforms
Update platforms d02, rcar, sam, hikey, mediatek, poplar, rpi3, sprd, zynqmp and marvell.
These platforms no more defines CFG_ confi
core: move CFG_TEE_CORE_NB_CORE to conf.mk for various platforms
Update platforms d02, rcar, sam, hikey, mediatek, poplar, rpi3, sprd, zynqmp and marvell.
These platforms no more defines CFG_ configuration directives as NB_CORE was the last remaining one.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org>
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| #
c9add4ac |
| 23-Nov-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm32: enable NEON with .fpu directive rather than compile flag
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU CF
core: arm32: enable NEON with .fpu directive rather than compile flag
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU CFG_WITH_VFP=y) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960 AArch32 {,pager}) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
cd11e1cb |
| 23-Nov-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Use -mfpu-neon for assembly files in TEE core only
Some platforms set arm32-platform-aflags += -mfpu-neon, which causes NEON to be selected when building any assembly files. TEE core, user-mode libr
Use -mfpu-neon for assembly files in TEE core only
Some platforms set arm32-platform-aflags += -mfpu-neon, which causes NEON to be selected when building any assembly files. TEE core, user-mode libraries and TAs are all affected by this setting.
This is most likely incorrect because user-mode libraries do not use NEON instructions (only some core files do). And, it does not make much sense to set it by default for TAs either.
So, core_arm32-platform-aflags should be set instead.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
e2c6da30 |
| 19-Sep-2017 |
Andrew F. Davis <afd@ti.com> |
plat-mediatek: Use CFG_CORE_CLUSTER_SHIFT to remove get_core_pos_mpidr()
Use the new CFG_CORE_CLUSTER_SHIFT to remove the platform specific core_pos() helpers.
Signed-off-by: Andrew F. Davis <afd@t
plat-mediatek: Use CFG_CORE_CLUSTER_SHIFT to remove get_core_pos_mpidr()
Use the new CFG_CORE_CLUSTER_SHIFT to remove the platform specific core_pos() helpers.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
43896851 |
| 23-May-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: factorize cpu support
Create core/arch/arm/cpu/<cpu-name>.mk to store CPU generic configurations settings. Update supported platforms to rely on the generic CPU support.
Platform shall still
core: factorize cpu support
Create core/arch/arm/cpu/<cpu-name>.mk to store CPU generic configurations settings. Update supported platforms to rely on the generic CPU support.
Platform shall still specify whether they support or not the NEON extension.
Cortex-A53 and Cortex-A57 are all ARMv8.0 compliant. For ARMv8 core, we will use ARMv8-A architecture minor version configuration files.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
fc68faa5 |
| 29-May-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: enable write-implies-execute-never when applicable
HW may or may not support STCLR "WXN" configuration field. CFG_HWSUPP_MEM_PERM_WXN reflects this state. AArch64 is assumed to always support
core: enable write-implies-execute-never when applicable
HW may or may not support STCLR "WXN" configuration field. CFG_HWSUPP_MEM_PERM_WXN reflects this state. AArch64 is assumed to always support this field.
Enable the "WXN" (and UWXN) bits in STCLR upon configuration directive CFG_CORE_RWDATA_NOEXEC.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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