| #
b1da690f |
| 07-Apr-2022 |
Andrew Davis <afd@ti.com> |
plat-ti: Enable hardware RNG PTA
When the hardware RNG is available we should also enable the HWRNG PTA so we can use it from the REE.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklan
plat-ti: Enable hardware RNG PTA
When the hardware RNG is available we should also enable the HWRNG PTA so we can use it from the REE.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
dd728cff |
| 21-Mar-2022 |
Andrew Davis <afd@ti.com> |
plat-ti: Disable SECURE_DATA_PATH until xtest is fixed
While SDP support is being re-worked disable support by default to prevent failing test cases. This will be re-enabled when the REE-side suppor
plat-ti: Disable SECURE_DATA_PATH until xtest is fixed
While SDP support is being re-worked disable support by default to prevent failing test cases. This will be re-enabled when the REE-side support is restored.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
f3721740 |
| 23-Jul-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove the unused PM stubs
Removes the PM stubs and all references to CFG_PM_STUBS.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.o
core: remove the unused PM stubs
Removes the PM stubs and all references to CFG_PM_STUBS.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
35e770df |
| 04-Jun-2020 |
Jerome Forissier <jerome@forissier.org> |
Move CFG_WITH_STACK_CANARIES to global config file
All platforms but one (bcm-ns3) set CFG_WITH_STACK_CANARIES ?= y in their configuration files. Move this flag to the global mk/config.mk instead. N
Move CFG_WITH_STACK_CANARIES to global config file
All platforms but one (bcm-ns3) set CFG_WITH_STACK_CANARIES ?= y in their configuration files. Move this flag to the global mk/config.mk instead. Not sure it matters much, but in order to avoid any functional change, CFG_WITH_STACK_CANARIES ?= n is added to plat-bcm/conf.mk.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
0146c7ad |
| 07-Jun-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make generic boot mandatory
The OP-TEE booting has since quite some time been unified in the sense that all platforms use CFG_GENERIC_BOOT=y. Make this configuration option mandatory and remov
core: make generic boot mandatory
The OP-TEE booting has since quite some time been unified in the sense that all platforms use CFG_GENERIC_BOOT=y. Make this configuration option mandatory and remove the CFG_GENERIC_BOOT flag.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
9f1eec75 |
| 17-Dec-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
Factor out ta-targets from platform config
Platforms use the same basic pattern again and again:
ta-targets = ta_arm32 ifeq ($(CFG_ARM64_core),y) ta-targets += ta_arm64 endif
Let's move this p
Factor out ta-targets from platform config
Platforms use the same basic pattern again and again:
ta-targets = ta_arm32 ifeq ($(CFG_ARM64_core),y) ta-targets += ta_arm64 endif
Let's move this pattern to core/arch/arm/arm.mk, make it the default, and cleanup the platform configuration files.
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
9460285e |
| 04-Jun-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
plat-*/conf.mk: use $(call force, ...) to set CFG_TEE_CORE_NB_CORE
Except for very special cases (such as virtualization), the number of CPU cores that can enter OP-TEE is a fixed number that depend
plat-*/conf.mk: use $(call force, ...) to set CFG_TEE_CORE_NB_CORE
Except for very special cases (such as virtualization), the number of CPU cores that can enter OP-TEE is a fixed number that depends on the hardware configuration and should not be configurable at build time. Therefore, use $(call force,CFG_TEE_CORE_NB_CORE,<value>) to set the value.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
2723fc9a |
| 26-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-ti: move some CFG_'s from platform_config.h to conf.mk
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Andrew F. Davis <afd@ti.com>
|
| #
c9add4ac |
| 23-Nov-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm32: enable NEON with .fpu directive rather than compile flag
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU CF
core: arm32: enable NEON with .fpu directive rather than compile flag
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU CFG_WITH_VFP=y) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960 AArch32 {,pager}) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
3bc5a8db |
| 19-Aug-2017 |
Andrew F. Davis <afd@ti.com> |
plat-ti: Configure and enable Secure Data Path by default
Enable SDP by default on TI platforms and reserve 4 MiB from the end of the TZDRAM area that is already reserved for OP-TEE and firewalled.
plat-ti: Configure and enable Secure Data Path by default
Enable SDP by default on TI platforms and reserve 4 MiB from the end of the TZDRAM area that is already reserved for OP-TEE and firewalled.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
0ec87468 |
| 13-Sep-2017 |
Andrew F. Davis <afd@ti.com> |
plat-ti: Add Suspend/Resume support for AM43xx
When the non-secure world is attempting to suspend it will call into the secure side using a platform service call. We implement this here in OP-TEE by
plat-ti: Add Suspend/Resume support for AM43xx
When the non-secure world is attempting to suspend it will call into the secure side using a platform service call. We implement this here in OP-TEE by saving the needed secure side registers.
On resume the ROM will restore the secure side to its original configuration and OP-TEE will be re-entered from its boot reset vector. Add a check for the resume case and restore the secure registers if we are resuming.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
89471990 |
| 07-Aug-2017 |
Andrew F. Davis <afd@ti.com> |
plat-ti: Disable TRNG use on AM43xx
On AM43xx family devices the non-secure side may IDLE hardware IP that are not in use. This will prevent the correct operation of these IP on the secure side. Unt
plat-ti: Disable TRNG use on AM43xx
On AM43xx family devices the non-secure side may IDLE hardware IP that are not in use. This will prevent the correct operation of these IP on the secure side. Until a solution to share management of IPs is developed, disable the secure driver for this platform.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
43896851 |
| 23-May-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: factorize cpu support
Create core/arch/arm/cpu/<cpu-name>.mk to store CPU generic configurations settings. Update supported platforms to rely on the generic CPU support.
Platform shall still
core: factorize cpu support
Create core/arch/arm/cpu/<cpu-name>.mk to store CPU generic configurations settings. Update supported platforms to rely on the generic CPU support.
Platform shall still specify whether they support or not the NEON extension.
Cortex-A53 and Cortex-A57 are all ARMv8.0 compliant. For ARMv8 core, we will use ARMv8-A architecture minor version configuration files.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
fc68faa5 |
| 29-May-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: enable write-implies-execute-never when applicable
HW may or may not support STCLR "WXN" configuration field. CFG_HWSUPP_MEM_PERM_WXN reflects this state. AArch64 is assumed to always support
core: enable write-implies-execute-never when applicable
HW may or may not support STCLR "WXN" configuration field. CFG_HWSUPP_MEM_PERM_WXN reflects this state. AArch64 is assumed to always support this field.
Enable the "WXN" (and UWXN) bits in STCLR upon configuration directive CFG_CORE_RWDATA_NOEXEC.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
75c6da9d |
| 20-Apr-2017 |
Andrew F. Davis <afd@ti.com> |
plat-ti: Add support for using HUK on DRA7xx/AM57xx
On DRA7xx/AM57xx the initial secure software will pass OP-TEE a Hardware Unique Key (HUK), use this key when requested.
Signed-off-by: Andrew F.
plat-ti: Add support for using HUK on DRA7xx/AM57xx
On DRA7xx/AM57xx the initial secure software will pass OP-TEE a Hardware Unique Key (HUK), use this key when requested.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
38f23772 |
| 21-Feb-2017 |
Andrew F. Davis <afd@ti.com> |
plat-ti: Add AM43xx platform services
The AM43xx ROM has a different monitor API set than DRA7xx/AM57xx devices, implement these services here.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-
plat-ti: Add AM43xx platform services
The AM43xx ROM has a different monitor API set than DRA7xx/AM57xx devices, implement these services here.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| #
19d8ffe4 |
| 29-Mar-2017 |
Andrew F. Davis <afd@ti.com> |
plat-ti: Add support for PL310 in AM43xx
AM43xx family devices use the ARM PL310 Cache Controller, add support for this here.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Joakim Bech <j
plat-ti: Add support for PL310 in AM43xx
AM43xx family devices use the ARM PL310 Cache Controller, add support for this here.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| #
1c0b8da6 |
| 21-Feb-2017 |
Andrew F. Davis <afd@ti.com> |
plat-ti: Add AM43xx platform flavor
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
|
| #
5849875f |
| 19-Aug-2015 |
Andrew F. Davis <afd@ti.com> |
monitor: Add support for platform services
Add the capability for a platform to plugin its own services, often legacy services for compatibility purposes.
Add these services for the dra7xx platform
monitor: Add support for platform services
Add the capability for a platform to plugin its own services, often legacy services for compatibility purposes.
Add these services for the dra7xx platform.
The file 'api_monitor_index.h' is synced to a an out-of-tree file and so we should ignore formatting. Add this exeption to checkpatch.
Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
c640d6ef |
| 15-Nov-2016 |
Andrew F. Davis <afd@ti.com> |
plat-ti: Enable GIC driver support for DRA7xx
The DRA7xx platform contains a standard GICv2. Enable this driver.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Jens Wiklander <jens.wiklan
plat-ti: Enable GIC driver support for DRA7xx
The DRA7xx platform contains a standard GICv2. Enable this driver.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
4d168941 |
| 19-Oct-2016 |
Andrew F. Davis <afd@ti.com> |
drivers: Add TRNG driver for DRA7
Add driver for the True Random Number Generator (TRNG) available on DRA7xx platforms.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Joakim Bech <joakim.
drivers: Add TRNG driver for DRA7
Add driver for the True Random Number Generator (TRNG) available on DRA7xx platforms.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
9fc53171 |
| 23-Aug-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
Fix invalid default value of $(PLATFORM_FLAVOR)
Fixes the following error:
$ make -s PLATFORM=stm core/arch/arm/plat-stm/system_config.mk:20: *** PLATFORM_FLAVOR=qemu_virt is not supporte
Fix invalid default value of $(PLATFORM_FLAVOR)
Fixes the following error:
$ make -s PLATFORM=stm core/arch/arm/plat-stm/system_config.mk:20: *** PLATFORM_FLAVOR=qemu_virt is not supported. Stop.
(one would expect PLATFORM_FLAVOR to default to 'orly2'). This patch does the following:
- Do not set "PLATFORM_FLAVOR ?= qemu_virt" in the main Makefile. The default value for PLATFORM_FLAVOR has to be defined by each platform in plat-*/conf.mk. - Consistent with the above, "PLATFORM_FLAVOR_$(PLATFORM_FLAVOR) := y" is moved to core/core.mk, after $(platform-dir)/conf.mk has been included, i.e., where $(PLATFORM_FLAVOR) can be relied upon. - All definitions of "PLATFORM_FLAVOR_$(PLATFORM_FLAVOR) := y" are removed from platform files, since it is already taken care of in core/core.mk.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
4d62e91a |
| 16-Aug-2016 |
Victor Chong <victor.chong@linaro.org> |
Enable static TA and core self tests..
..for all platforms by setting
CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= y
in mk/config.mk.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Suggested-by: J
Enable static TA and core self tests..
..for all platforms by setting
CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= y
in mk/config.mk.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Suggested-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
49a4b3bb |
| 16-Mar-2016 |
Pascal Brand <pascal.brand@st.com> |
CFG_CRYPTO_SIZE_OPTIMIZATION?=y by default
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Pascal Brand <pascal.bra
CFG_CRYPTO_SIZE_OPTIMIZATION?=y by default
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Pascal Brand <pascal.brand@st.com>
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| #
8a6a60a5 |
| 16-Mar-2016 |
Pascal Brand <pascal.brand@st.com> |
Rename libtomcrypt_with_optimize_size in CFG_CRYPTO_SIZE_OPTIMIZATION
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-b
Rename libtomcrypt_with_optimize_size in CFG_CRYPTO_SIZE_OPTIMIZATION
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Pascal Brand <pascal.brand@st.com>
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