| #
847ee293 |
| 16-Jul-2025 |
Akshay Belsare <akshay.belsare@amd.com> |
plat-versal2: use auto PA bit discovery
Removes hardcoded configuration for large physical address and ARM64 PA bits, enabling automatic discovery of the maximal PA supported by the hardware.
Signe
plat-versal2: use auto PA bit discovery
Removes hardcoded configuration for large physical address and ARM64 PA bits, enabling automatic discovery of the maximal PA supported by the hardware.
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
002bd204 |
| 24-Jun-2025 |
Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com> |
plat-versal2: conf: Add maximum size of the DTB
The DTB size for the AMD platform is larger and does not fit into the default size, leading to failure or panic at boot time due to size issues.
Thus
plat-versal2: conf: Add maximum size of the DTB
The DTB size for the AMD platform is larger and does not fit into the default size, leading to failure or panic at boot time due to size issues.
Thus setting an explicit maximum size for the Device Tree Blob to allow safe modifications. This ensures there is enough space when appending or editing nodes/properties in the DTB.
Signed-off-by: Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com> Acked-by: Akshay Belsare <akshay.belsare@amd.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
d3c37848 |
| 07-Feb-2025 |
Akshay Belsare <akshay.belsare@amd.com> |
drivers: amd: Add PS GPIO Support
Add PS GPIO Driver support for AMD Platforms.
The PS GPIO Controller is managed through the PS subsystem and can operate in either the Secure World or the Non-Secu
drivers: amd: Add PS GPIO Support
Add PS GPIO Driver support for AMD Platforms.
The PS GPIO Controller is managed through the PS subsystem and can operate in either the Secure World or the Non-Secure World. The driver utilizes the Device Tree Blob (DTB) to determine whether the PS GPIO Controller should be supported in the Secure World.
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
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| #
71aed2db |
| 27-Jan-2025 |
Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com> |
plat-versal2: disable ARM CE v8.2
Disable the ARM CE v8.2 configuration since it is not available on the SoC. Allow the ARM CE configuration to be overridden at build time while keeping the default
plat-versal2: disable ARM CE v8.2
Disable the ARM CE v8.2 configuration since it is not available on the SoC. Allow the ARM CE configuration to be overridden at build time while keeping the default value enabled.
Signed-off-by: Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
79ea7b0a |
| 10-Dec-2024 |
Akshay Belsare <akshay.belsare@amd.com> |
plat-versal2: config to select console uart
Add configuration to select console uart for AMD Versal Gen 2 platform. Console UART can be selected through CFG_CONSOLE_UART. Defaults to UART0.
Signed-
plat-versal2: config to select console uart
Add configuration to select console uart for AMD Versal Gen 2 platform. Console UART can be selected through CFG_CONSOLE_UART. Defaults to UART0.
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com>
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| #
59a0f5d0 |
| 01-Nov-2023 |
Akshay Belsare <akshay.belsare@amd.com> |
plat-versal2: add support for AMD Versal Gen 2
Add support for AMD Versal Gen 2 platform. AMD Versal Gen 2 is a new SoC based on ARM A78AE with GICv3 and UART over pl011.
Signed-off-by: Akshay Bels
plat-versal2: add support for AMD Versal Gen 2
Add support for AMD Versal Gen 2 platform. AMD Versal Gen 2 is a new SoC based on ARM A78AE with GICv3 and UART over pl011.
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Signed-off-by: Amey Avinash Raghatate <ameyavinash.raghatate@amd.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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