core: ls: correct CFG_CORE_ARM64_PA_BITS for LX2160A-RDB/QDS

Correct CFG_CORE_ARM64_PA_BITS for LX2160A-RDB/QDS

Fixes: a8a14b78eef6 ("core: ls: lx2160ardb: Add regions for dynamic shared memory")
F

core: ls: correct CFG_CORE_ARM64_PA_BITS for LX2160A-RDB/QDS

Correct CFG_CORE_ARM64_PA_BITS for LX2160A-RDB/QDS

Fixes: a8a14b78eef6 ("core: ls: lx2160ardb: Add regions for dynamic shared memory")
Fixes: 1a1214016d1c ("core: ls: add LX2160A-QDS platform")
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: ls: enable CFG_PKCS11_TA

Enable PKCS11 TA by default for LS platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: ls: enabled CFG_ENABLE_EMBEDDED_TESTS by default

Enable embedded tests by default on Layerscape platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jer

core: ls: enabled CFG_ENABLE_EMBEDDED_TESTS by default

Enable embedded tests by default on Layerscape platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: ls: increase heap size to 128k

In xtest_regression_4011, with libtomcrypt enabled, the allocation of a 4k
buffer would eventually fail (TEE_ERROR_OUT_OF_MEMORY) during the
allocation.

Signed-

core: ls: increase heap size to 128k

In xtest_regression_4011, with libtomcrypt enabled, the allocation of a 4k
buffer would eventually fail (TEE_ERROR_OUT_OF_MEMORY) during the
allocation.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: ls: remove CFG_WITH_SOFTWARE_PRNG default definition for LS platforms

Remove the enablement of CFG_WITH_SOFTWARE_PRNG flag when the CAAM is
disabled. CFG_WITH_SOFTWARE_PRNG is enabled by defau

core: ls: remove CFG_WITH_SOFTWARE_PRNG default definition for LS platforms

Remove the enablement of CFG_WITH_SOFTWARE_PRNG flag when the CAAM is
disabled. CFG_WITH_SOFTWARE_PRNG is enabled by default.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-imx, plat-ls: replace crypto_conf.mk by common drivers/crypto/caam/crypto.mk

move platform specific conf file to crypto drivers one.
CFG_CRYPTO_DRIVER should be define in driver conf file
inste

plat-imx, plat-ls: replace crypto_conf.mk by common drivers/crypto/caam/crypto.mk

move platform specific conf file to crypto drivers one.
CFG_CRYPTO_DRIVER should be define in driver conf file
instead of platform configuration file.

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Clement Faure <clement.faure@nxp.com>

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core: plat-ls: remove OP-TEE support for LS1021A-QDS platform

LS1021A-QDS does not support OP-TEE anymore, removing its
support.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jer

core: plat-ls: remove OP-TEE support for LS1021A-QDS platform

LS1021A-QDS does not support OP-TEE anymore, removing its
support.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: plat-ls: remove OP-TEE support for LS1021A-TWR platform

LS1021A-TWR does not support OP-TEE anymore, removing its
support.
Since LS1021A-TWR was default platform for LS, updating default
platf

core: plat-ls: remove OP-TEE support for LS1021A-TWR platform

LS1021A-TWR does not support OP-TEE anymore, removing its
support.
Since LS1021A-TWR was default platform for LS, updating default
platform also to LS1012A-RDB

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: plat-ls: correct expression CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE

There was no parenthesis around CFG_TEE_CORE_NB_CORE
when assigning it to CFG_NUM_THREADS, so corrected it.

Signed-off-by:

core: plat-ls: correct expression CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE

There was no parenthesis around CFG_TEE_CORE_NB_CORE
when assigning it to CFG_NUM_THREADS, so corrected it.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: plat-ls: remove OP-TEE support for LS1012A-FRWY platform

LS1012A-FRWY does not support OP-TEE anymore, removing its
support.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: J

core: plat-ls: remove OP-TEE support for LS1012A-FRWY platform

LS1012A-FRWY does not support OP-TEE anymore, removing its
support.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: plat-ls: set CFG_NUM_THREADS ?= 2 for LS1012ARDB

xtest regression_1009.3 fails on LS1012ARDB because the test needs
at least two threads but the default configuration for the platform
enables

core: plat-ls: set CFG_NUM_THREADS ?= 2 for LS1012ARDB

xtest regression_1009.3 fails on LS1012ARDB because the test needs
at least two threads but the default configuration for the platform
enables only one. Set CFG_NUM_THREADS ?= 2 to fix the issue.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm.mk: set CFG_ARM32_core=y when CFG_ARM34_core != y

Updates core/arch/arm/arm.mk to assume 32-bit mode when not 64-bit and
simplify the platforms conf.mk accordingly.

Signed-off-by: Jerome

core: arm.mk: set CFG_ARM32_core=y when CFG_ARM34_core != y

Updates core/arch/arm/arm.mk to assume 32-bit mode when not 64-bit and
simplify the platforms conf.mk accordingly.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y

Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the
common file core/arch/arm/arm.mk instead of leaving it to the platfo

core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y

Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the
common file core/arch/arm/arm.mk instead of leaving it to the platforms.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: ls: remove CAAM endianness definitions from conf.mk

Remove CAAM endianness definition (CFG_CAAM_LITTLE_ENDIAN and
CFG_CAAM_BIG_ENDIAN) from conf.mk as it is already defined in
crypto_conf.mk

core: ls: remove CAAM endianness definitions from conf.mk

Remove CAAM endianness definition (CFG_CAAM_LITTLE_ENDIAN and
CFG_CAAM_BIG_ENDIAN) from conf.mk as it is already defined in
crypto_conf.mk

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ls: conf.mk: correct Embedded DTB flag

Emebedded DTB flag is CFG_EMBED_DTB which was wrongly
set as CFG_EMBED_DT.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Etienne Carri

plat-ls: conf.mk: correct Embedded DTB flag

Emebedded DTB flag is CFG_EMBED_DTB which was wrongly
set as CFG_EMBED_DT.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: plat-ls: get HW unique key using OP-TEE CAAM driver

Previously HW Unique key on LS platforms came through ATF
via SMC, since we have CAAM driver available in OP-TEE
itself, will use that direc

core: plat-ls: get HW unique key using OP-TEE CAAM driver

Previously HW Unique key on LS platforms came through ATF
via SMC, since we have CAAM driver available in OP-TEE
itself, will use that directly from now on.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: ls: set SGT properties for LS platforms

Set the following SGT properties for LS platforms:
* CFG_CAAM_SGT_ALIGN
* CFG_NXP_CAAM_SGT_V1/V2

Signed-off-by: Clement Faure <clement.faure@nxp.co

core: ls: set SGT properties for LS platforms

Set the following SGT properties for LS platforms:
* CFG_CAAM_SGT_ALIGN
* CFG_NXP_CAAM_SGT_V1/V2

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com>

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plat-ls: Add DSPI driver for NXP LS Platforms

This patch adds DSPI driver for Layerscape Platforms.
DSPI compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Carl Lamb

plat-ls: Add DSPI driver for NXP LS Platforms

This patch adds DSPI driver for Layerscape Platforms.
DSPI compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Carl Lamb <calamb@microsoft.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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plat-ls: Add GPIO driver for NXP LS Platforms

This patch adds GPIO driver for Layerscape Platforms.
GPIO compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Manish Tom

plat-ls: Add GPIO driver for NXP LS Platforms

This patch adds GPIO driver for Layerscape Platforms.
GPIO compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Acked-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

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plat-ls: add i2c driver for NXP LS Platforms

I2C Driver compilation is enabled by default for LX2160A-RDB
and LX2160A-QDS.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Jens W

plat-ls: add i2c driver for NXP LS Platforms

I2C Driver compilation is enabled by default for LX2160A-RDB
and LX2160A-QDS.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Clement Faure <clement.faure@nxp.com>

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core: ls: lx2160aqds: get GIC base address from dtb

CFG_EMBED_DT option is enabled by default for LX2160A-QDS
GIC base address was hardcoded for LX2160A-QDS,
now will get the base address from dtb f

core: ls: lx2160aqds: get GIC base address from dtb

CFG_EMBED_DT option is enabled by default for LX2160A-QDS
GIC base address was hardcoded for LX2160A-QDS,
now will get the base address from dtb file.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: ls: add LX2160A-QDS platform

Add support for Layerscape® LX2160A-QDS from NXP.
Dynamic shared memory is also enabled.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Sahil M

core: ls: add LX2160A-QDS platform

Add support for Layerscape® LX2160A-QDS from NXP.
Dynamic shared memory is also enabled.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: ls: lx2160ardb: get GIC base address from dtb

CFG_EMBED_DT option is enabled by default for LX2160A-RDB
GIC base address was hardcoded for LX2160A-RDB,
now will get the base address from dtb f

core: ls: lx2160ardb: get GIC base address from dtb

CFG_EMBED_DT option is enabled by default for LX2160A-RDB
GIC base address was hardcoded for LX2160A-RDB,
now will get the base address from dtb file.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: ls: lx2160ardb: Add regions for dynamic shared memory

To enable use of dynamic shared memory, DDR regions
need to be added in the platform MMU map.

Signed-off-by: Ruchika Gupta <ruchika.gupta

core: ls: lx2160ardb: Add regions for dynamic shared memory

To enable use of dynamic shared memory, DDR regions
need to be added in the platform MMU map.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: remove the unused PM stubs

Removes the PM stubs and all references to CFG_PM_STUBS.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.o

core: remove the unused PM stubs

Removes the PM stubs and all references to CFG_PM_STUBS.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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