xref: /optee_os/core/arch/arm/plat-mediatek/conf.mk (revision 1677a7fb692188b67da73b48033790baf681fb3a)
1739804b5SJens WiklanderPLATFORM_FLAVOR ?= mt8173
244bd24c5SJames Kung
3bdb6a6afSFabien ParentCFG_ARM64_core ?= y
4bdb6a6afSFabien Parent
543896851SEtienne Carriereinclude core/arch/arm/cpu/cortex-armv8-0.mk
643896851SEtienne Carriere
7dffb0049SJerome Forissier$(call force,CFG_8250_UART,y)
8dffb0049SJerome Forissier$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
9dffb0049SJerome Forissier$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
1044bd24c5SJames Kung
11292b3186SJulien Masson# default DRAM base address
12292b3186SJulien MassonCFG_DRAM_BASE ?= 0x40000000
13292b3186SJulien Masson
14292b3186SJulien Masson# default DRAM size 1 GiB
15292b3186SJulien MassonCFG_DRAM_SIZE ?= 0x40000000
16292b3186SJulien Masson
17*1677a7fbSGavin Liu# When need to create a virtual memory pool for mapping other
18*1677a7fbSGavin Liu# physical address, enable the config to increase MAX_XLAT_TABLES.
19*1677a7fbSGavin LiuCFG_MTK_RESERVED_VA ?= n
20*1677a7fbSGavin Liu
21e2c6da30SAndrew F. Davisifeq ($(PLATFORM_FLAVOR),mt8173)
22e2c6da30SAndrew F. Davis# 2**1 = 2 cores per cluster
23d53c0183SFabien Parent$(call force,CFG_TEE_CORE_NB_CORE,4)
24e2c6da30SAndrew F. Davis$(call force,CFG_CORE_CLUSTER_SHIFT,1)
25ade61fecSFabien ParentCFG_TZDRAM_START ?= 0xbe000000
26ade61fecSFabien ParentCFG_TZDRAM_SIZE ?= 0x01e00000
27ade61fecSFabien ParentCFG_SHMEM_START ?= 0xbfe00000
28ade61fecSFabien ParentCFG_SHMEM_SIZE ?= 0x00200000
29ade61fecSFabien Parentendif
30ade61fecSFabien Parent
314451b84eSFabien Parentifeq ($(PLATFORM_FLAVOR),mt8175)
324451b84eSFabien Parent$(call force,CFG_TEE_CORE_NB_CORE,4)
334451b84eSFabien Parent$(call force,CFG_CORE_CLUSTER_SHIFT,2)
344451b84eSFabien Parent$(call force,CFG_ARM_GICV3,y)
354451b84eSFabien Parent$(call force,CFG_GIC,y)
364451b84eSFabien ParentCFG_TZDRAM_START ?= 0x43200000
374451b84eSFabien ParentCFG_TZDRAM_SIZE ?=  0x00a00000
384451b84eSFabien ParentCFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
394451b84eSFabien ParentCFG_SHMEM_SIZE ?= 0x00200000
404451b84eSFabien Parentendif
414451b84eSFabien Parent
42ade61fecSFabien Parentifeq ($(PLATFORM_FLAVOR),mt8516)
43d53c0183SFabien Parent$(call force,CFG_TEE_CORE_NB_CORE,4)
44ade61fecSFabien Parent$(call force,CFG_CORE_CLUSTER_SHIFT,2)
45ade61fecSFabien ParentCFG_TZDRAM_START ?= 0x4fd00000
46ade61fecSFabien ParentCFG_TZDRAM_SIZE ?=  0x00300000
4733b9b4b9SJulien MassonCFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
48ade61fecSFabien ParentCFG_SHMEM_SIZE ?= 0x00200000
49e2c6da30SAndrew F. Davisendif
50d53c0183SFabien Parent
51d53c0183SFabien Parentifeq ($(PLATFORM_FLAVOR),mt8183)
52d53c0183SFabien Parent$(call force,CFG_TEE_CORE_NB_CORE,8)
53d53c0183SFabien Parent$(call force,CFG_CORE_CLUSTER_SHIFT,2)
54d53c0183SFabien Parent$(call force,CFG_ARM_GICV3,y)
55d53c0183SFabien Parent$(call force,CFG_GIC,y)
56d53c0183SFabien ParentCFG_TZDRAM_START ?= 0x4fd00000
57d53c0183SFabien ParentCFG_TZDRAM_SIZE ?=  0x00300000
5833b9b4b9SJulien MassonCFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
59d53c0183SFabien ParentCFG_SHMEM_SIZE ?= 0x00200000
60d53c0183SFabien Parentendif
6185015631SFabien Parent
6285015631SFabien Parentifeq ($(PLATFORM_FLAVOR),mt8195)
6385015631SFabien Parent$(call force,CFG_TEE_CORE_NB_CORE,8)
6485015631SFabien Parent$(call force,CFG_CORE_CLUSTER_SHIFT,2)
6585015631SFabien Parent$(call force,CFG_ARM_GICV3,y)
6685015631SFabien Parent$(call force,CFG_GIC,y)
6785015631SFabien Parent$(call force,CFG_CORE_ARM64_PA_BITS,36)
6885015631SFabien ParentCFG_TZDRAM_START ?= 0x43200000
6985015631SFabien ParentCFG_TZDRAM_SIZE ?=  0x00a00000
7085015631SFabien ParentCFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
7185015631SFabien ParentCFG_SHMEM_SIZE ?= 0x00200000
7285015631SFabien Parentendif
73ace93cc7SGavin Liu
74ace93cc7SGavin Liuifeq ($(PLATFORM_FLAVOR),mt8188)
75ace93cc7SGavin Liu$(call force,CFG_TEE_CORE_NB_CORE,8)
76ace93cc7SGavin Liu$(call force,CFG_CORE_CLUSTER_SHIFT,2)
77ace93cc7SGavin Liu$(call force,CFG_ARM_GICV3,y)
78ace93cc7SGavin Liu$(call force,CFG_GIC,y)
79ace93cc7SGavin Liu$(call force,CFG_CORE_ARM64_PA_BITS,36)
80ace93cc7SGavin LiuCFG_TZDRAM_START ?= 0x43200000
81ace93cc7SGavin LiuCFG_TZDRAM_SIZE ?=  0x00a00000
82ace93cc7SGavin LiuCFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
83ace93cc7SGavin LiuCFG_SHMEM_SIZE ?= 0x00200000
84ace93cc7SGavin Liuendif
8558dbe3dfSguan-gm.lin
8658dbe3dfSguan-gm.linifeq ($(PLATFORM_FLAVOR),mt7988)
8758dbe3dfSguan-gm.lin$(call force,CFG_TEE_CORE_NB_CORE,4)
8858dbe3dfSguan-gm.lin$(call force,CFG_CORE_CLUSTER_SHIFT,1)
8958dbe3dfSguan-gm.lin$(call force,CFG_ARM_GICV3,y)
9058dbe3dfSguan-gm.lin$(call force,CFG_GIC,y)
919ed8348bSCharles Herz$(call force,CFG_WITH_SOFTWARE_PRNG,y)
9258dbe3dfSguan-gm.linCFG_TZDRAM_START ?= 0x43041000
9358dbe3dfSguan-gm.linCFG_TZDRAM_SIZE ?=  0x04ff000
9458dbe3dfSguan-gm.linCFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
9558dbe3dfSguan-gm.linCFG_SHMEM_SIZE ?= 0x00200000
9658dbe3dfSguan-gm.linendif
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