core: panic: allow core halting on SGI in other cases than panic()

There may be cases where we want to halt several cores outside of a
panic() sequence.

Therefore, add CFG_MULTI_CORE_HALTING switch

core: panic: allow core halting on SGI in other cases than panic()

There may be cases where we want to halt several cores outside of a
panic() sequence.

Therefore, add CFG_MULTI_CORE_HALTING switch that allows to register
an interrupt handler for the CFG_HALT_CORES_SGI that is dedicated to
halt other cores.

This reduces the scope of CFG_HALT_CORES_ON_PANIC that is now used only
for halting other cores in a panic() sequence.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rtc: add init configuration function

The init function aims to contains init configurations of the RTC
peripheral such as prescalers, config or calibration registers.
Add "CFG_STM32_H

drivers: stm32_rtc: add init configuration function

The init function aims to contains init configurations of the RTC
peripheral such as prescalers, config or calibration registers.
Add "CFG_STM32_HIGH_ACCURACY" (default to no) config to enable the
high accuracy mode which allow the highest refresh rate of the subsecond
register.
Also merge the functions `stm32_rtc_wait_sync()` with
`stm32_exit_init_mode()` as every stm32 exit init mode was followed
by a wait sync.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: add support for RTC PTA

Compile the RTC PTA and the RTC driver if the RTC driver for stm32 is
enabled.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Et

plat-stm32mp1: add support for RTC PTA

Compile the RTC PTA and the RTC driver if the RTC driver for stm32 is
enabled.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: conf: default enable CFG_STM32_EXTI

Enable the driver stm32_exti on stm32mp1xx.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carr

plat-stm32mp1: conf: default enable CFG_STM32_EXTI

Enable the driver stm32_exti on stm32mp1xx.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: conf: enable SCMI PERF for stm32mp13

Enable CFG_SCMI_MSG_PERF_DOMAIN for STM32MP13 that is used
to provide CPU OPP to linux.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Rev

plat-stm32mp1: conf: enable SCMI PERF for stm32mp13

Enable CFG_SCMI_MSG_PERF_DOMAIN for STM32MP13 that is used
to provide CPU OPP to linux.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: default enable CFG_STM32_CPU_OPP for STM32MP13

Enable CFG_STM32_CPU_OPP for STM32MP13 and increase
CFG_STM32MP_OPP_COUNT to 3 OPP.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.co

plat-stm32mp1: default enable CFG_STM32_CPU_OPP for STM32MP13

Enable CFG_STM32_CPU_OPP for STM32MP13 and increase
CFG_STM32MP_OPP_COUNT to 3 OPP.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: conf: default enable HASH

Default enable HASH compilation.
Enable CFG_STM32_CRYPTO_DRIVERS if any crypto IP is compiled.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>

plat-stm32mp1: conf: default enable HASH

Default enable HASH compilation.
Enable CFG_STM32_CRYPTO_DRIVERS if any crypto IP is compiled.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: conf: default enable PKA

Default enable PKA compilation.
Enable the STM32_CRYPTO_DRIVERS if PKA is compiled.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by:

plat-stm32mp1: conf: default enable PKA

Default enable PKA compilation.
Enable the STM32_CRYPTO_DRIVERS if PKA is compiled.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: enable RTC framework if CFG_DRIVERS_RTC is set

If CFG_DRIVERS_RTC is enabled, force the compilation of the file
core/drivers/rtc/rtc.c in order to share the generic functions.

Signed

plat-stm32mp1: enable RTC framework if CFG_DRIVERS_RTC is set

If CFG_DRIVERS_RTC is enabled, force the compilation of the file
core/drivers/rtc/rtc.c in order to share the generic functions.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: conf: default enable the RTC driver

Default enable the RTC driver support on stm32mp1 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne

plat-stm32mp1: conf: default enable the RTC driver

Default enable the RTC driver support on stm32mp1 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: remove deprecated shared_resource driver

Remove stm32mp1 platform shared_resources.c driver that is no more used.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked

plat-stm32mp1: remove deprecated shared_resource driver

Remove stm32mp1 platform shared_resources.c driver that is no more used.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: CFG_STM32_IWDG requires CFG_WDT_SM_HANDLER

Driver stm32_iwdg only aims at exposing an OP-TEE watchdog
service hence declare CFG_STM32_IWDG dependency on CFG_WDT and
CFG_WDT_SM_HANDLER

plat-stm32mp1: CFG_STM32_IWDG requires CFG_WDT_SM_HANDLER

Driver stm32_iwdg only aims at exposing an OP-TEE watchdog
service hence declare CFG_STM32_IWDG dependency on CFG_WDT and
CFG_WDT_SM_HANDLER in stm32mp1 platform configuration file.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: add CFG_STM32_ALLOW_UNSAFE_PROBE to probe unsafe peripherals

Add CFG_STM32_ALLOW_UNSAFE_PROBE that allows to unsafely probe
peripherals. This means that the firewall configuration wil

plat-stm32mp1: add CFG_STM32_ALLOW_UNSAFE_PROBE to probe unsafe peripherals

Add CFG_STM32_ALLOW_UNSAFE_PROBE that allows to unsafely probe
peripherals. This means that the firewall configuration will not be
checked before probing a peripheral. Default enable this switch for
DH platforms that use non-securable peripherals in OP-TEE.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: default enable CFG_DRIVERS_FIREWALL

Default enable the CFG_DRIVERS_FIREWALL switch that is used to enable
the support of the firewall framework.

On this platform, only the ETZPC is a

plat-stm32mp1: default enable CFG_DRIVERS_FIREWALL

Default enable the CFG_DRIVERS_FIREWALL switch that is used to enable
the support of the firewall framework.

On this platform, only the ETZPC is a firewall controller for now.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: pager use SYSRAM last page if possible

Update stm32mp1 with pager TZSRAM size to use SYSRAM last page
now that pager implementation issue pager pageable boundary is
addressed.

Signed

plat-stm32mp1: pager use SYSRAM last page if possible

Update stm32mp1 with pager TZSRAM size to use SYSRAM last page
now that pager implementation issue pager pageable boundary is
addressed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: conf: restore generic default heap size

Remove reduced default heap size configuration of 48kB when pager is
enabled on stm32mp1 platforms. 48kB of core heap may not always be enough

plat-stm32mp1: conf: restore generic default heap size

Remove reduced default heap size configuration of 48kB when pager is
enabled on stm32mp1 platforms. 48kB of core heap may not always be enough
to pass OP-TEE Test regression test 4011 related to Bleichenbacher attack
since it consumes 4.5kB more memory on in OP-TEE core since we upgraded
to Mbed TLS library 3.6.0. The platform now default uses the generic 64kB
default heap size set from mk/config.mk.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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core/scmi: export sub.mk files in SCP-firmware

In order to ease the update of makefile when C or Header files of
SCP-firmware project changes, we integrate them in the optee subdirectory
of SCP-firm

core/scmi: export sub.mk files in SCP-firmware

In order to ease the update of makefile when C or Header files of
SCP-firmware project changes, we integrate them in the optee subdirectory
of SCP-firmware.

sub-optee-fvp.mk and sub-optee-stm32mp1.mk are moved unchanged in their
product directories of SCP-repository.

scmi-server/sub.mk is split:
- macro and compilation flags stay in optee-os
- srcs and incdirs are moved in product/optee directory

All modules and products related to optee are located in the
product/optee directory in the SCP-firmware repository, adding an "optee-"
prefix in the product name is useless. Remove it.

the ci will temporary point to the sha1 of the merged MR branch of
SCP-firmware. This will be replaced with next SCP-firmware tag v2.15.0
once released.

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: stm32_rstctrl: move stm32mp1x controller in stm32mp1_rstcrl.c

This change prepares the STM32MP25 reset controller driver.
The binding for the STM32MP25 is different from that of the
STM32MP

drivers: stm32_rstctrl: move stm32mp1x controller in stm32mp1_rstcrl.c

This change prepares the STM32MP25 reset controller driver.
The binding for the STM32MP25 is different from that of the
STM32MP1x, so we will create a stm32mp25_rstcrl.c file.
This change factorizes STM32 API functions in stm32_rstcrl.c file
for probing and passing platform data.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: default enable SAES software fallback

Default enable SAES software fallback for 192bit keys support.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne

plat-stm32mp1: default enable SAES software fallback

Default enable SAES software fallback for 192bit keys support.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: fix misnamed 157C_EV1_SCMI flavor

Correct platform flavor name 157C_EV1_SCMI, not 157F_EV1_SCMI.

Fixes: 36f1fd6d4930 ("dts: add stm32mp15*-scmi.dts files for when RCC is secure")
Ack

plat-stm32mp1: fix misnamed 157C_EV1_SCMI flavor

Correct platform flavor name 157C_EV1_SCMI, not 157F_EV1_SCMI.

Fixes: 36f1fd6d4930 ("dts: add stm32mp15*-scmi.dts files for when RCC is secure")
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: add stm32mp15*-scmi.dts files for when RCC is secure

For legacy reason and compatibility with existing platforms embedding
OP-TEE with RCC secure hardening being disabled, introduce -scmi.dts f

dts: add stm32mp15*-scmi.dts files for when RCC is secure

For legacy reason and compatibility with existing platforms embedding
OP-TEE with RCC secure hardening being disabled, introduce -scmi.dts for
the 4 ST boards STM32MP15x: DK1, DK2, ED1 and EV1 where we enable RCC
security require non-secure world to use SCMI resources. Add platform
flavors 157x_XXX_SCMI to ease DTS selection.

stm32mp15*-<board>.dts applies an insecure RCC configuration.
stm32mp15*-<board>-scmi.dts applies the secure RCC configuration.
This better reflects the configurations supported in the Linux kernel
and U-Boot source trees.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: Add the remoteproc TA in early TA list

On the stm32mp1 platform, it is possible to load firmware during the
bootloader stage, for instance, by U-boot. To enable this feature,
The remo

plat-stm32mp1: Add the remoteproc TA in early TA list

On the stm32mp1 platform, it is possible to load firmware during the
bootloader stage, for instance, by U-boot. To enable this feature,
The remoteproc TA should be added to the list of early-TAs.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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pta: stm32mp: add new remoteproc PTA

Add remoteproc PTA for the stm32mp1 platform.
The PTA relies on the stm32_remoteproc driver for the remoteproc
management.
It is charge of providing interface fo

pta: stm32mp: add new remoteproc PTA

Add remoteproc PTA for the stm32mp1 platform.
The PTA relies on the stm32_remoteproc driver for the remoteproc
management.
It is charge of providing interface for authenticating firmware images
and managing the remote processor live cycle.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: Add stm32mp1 remoteproc driver

This driver is responsible for configuring the registers and memories of
the remote processor.
- It stores information about memories assigned to the remote p

drivers: Add stm32mp1 remoteproc driver

This driver is responsible for configuring the registers and memories of
the remote processor.
- It stores information about memories assigned to the remote processor
based on the device tree.
- It ensures consistency between the registered memory and the addresses
of the firmware segments to be loaded.
- Additionally, it is responsible for starting and stopping the remote
processor core.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm32mp1: exposes a fastcall SMC watchdog service

Default defines watchdog management SMC based service for non-secure
world to manage the watchdog supervised by OP-TEE secure world.
Non-secure

plat-stm32mp1: exposes a fastcall SMC watchdog service

Default defines watchdog management SMC based service for non-secure
world to manage the watchdog supervised by OP-TEE secure world.
Non-secure world system can leverage this service for example by
enabling a "arm,smc-wdt" compatible node with arm,smc-id=<0xbc000000>
property in its DT.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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