| #
d5749450 |
| 12-Oct-2024 |
Tony Han <tony.han@microchip.com> |
plat-sam: enable SCMI reset domain management protocol and rstctrl driver
Enable CFG_SCMI_MSG_RESET_DOMAIN and CFG_DRIVERS_RSTCTRL.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienn
plat-sam: enable SCMI reset domain management protocol and rstctrl driver
Enable CFG_SCMI_MSG_RESET_DOMAIN and CFG_DRIVERS_RSTCTRL.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
8796ab4a |
| 04-Nov-2024 |
Tony Han <tony.han@microchip.com> |
drivers: microchip_pit: add driver for sama7g54's pit64b
Add support for the peripheral PIT64B in sama7g54. In the driver the clocks are initialized for PIT64B.
Signed-off-by: Tony Han <tony.han@mi
drivers: microchip_pit: add driver for sama7g54's pit64b
Add support for the peripheral PIT64B in sama7g54. In the driver the clocks are initialized for PIT64B.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
952dbec7 |
| 21-Aug-2024 |
Tony Han <tony.han@microchip.com> |
plat-sam: implement PL310 SMC protocol
When Linux runs in normal world, it expects the PL310 to be initially disabled, and then invokes SMCs to enable it. Let CFG_PL310_SIP_PROTOCOL=y, and the L2 ca
plat-sam: implement PL310 SMC protocol
When Linux runs in normal world, it expects the PL310 to be initially disabled, and then invokes SMCs to enable it. Let CFG_PL310_SIP_PROTOCOL=y, and the L2 cache will be left untouched until the OS enables it.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
16fbd46d |
| 26-Oct-2022 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: remove CFG_PL310_LOCKED
When locking the PL310 cache, it behaves as disable which lead to poor performances in Linux.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-b
plat-sam: remove CFG_PL310_LOCKED
When locking the PL310 cache, it behaves as disable which lead to poor performances in Linux.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
fc57019c |
| 12-Sep-2023 |
Tony Han <tony.han@microchip.com> |
plat-sam: add support for Microchip sama7g54-ek board
Add the main functions for sama7g54 initialize, including: - console_init() - Matrix, TZC, TZPM, interrupt related Update conf.mk and Makefile
plat-sam: add support for Microchip sama7g54-ek board
Add the main functions for sama7g54 initialize, including: - console_init() - Matrix, TZC, TZPM, interrupt related Update conf.mk and Makefile for sama7g5 OP-TEE support.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
a557f877 |
| 20-Mar-2024 |
Tony Han <tony.han@microchip.com> |
plat-sam: optimize the macro and makefile for building sama5d2 clocks
Rename 'CFG_DRIVERS_SAMA5D2_CLK' to 'CFG_SAMA5D2'. Adjust the sequence of source files in 'core/drivers/clk/sam/sub.mk'.
Signed
plat-sam: optimize the macro and makefile for building sama5d2 clocks
Rename 'CFG_DRIVERS_SAMA5D2_CLK' to 'CFG_SAMA5D2'. Adjust the sequence of source files in 'core/drivers/clk/sam/sub.mk'.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
f673afe4 |
| 27-Mar-2023 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable NVMEM unique hardware key and die id support
Enable NVMEM support to allow reading hardware unique key from the fuses.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Sign
plat-sam: enable NVMEM unique hardware key and die id support
Enable NVMEM support to allow reading hardware unique key from the fuses.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
b8514c13 |
| 29-Jan-2024 |
Thomas Perrot <thomas.perrot@bootlin.com> |
plat-sam: fix static shared memory address and size
Disable the dynamic shared memory allocation that isn't used on SAM platforms, otherwise the following issue occurs, since the commit 8a6ca1480ddc
plat-sam: fix static shared memory address and size
Disable the dynamic shared memory allocation that isn't used on SAM platforms, otherwise the following issue occurs, since the commit 8a6ca1480ddc ("core: arm: get DDR range from embedded DTB"):
I/TC: Embedded DTB found E/TC:0 0 check_phys_mem_is_outside:409 Non-sec mem (0x20800000:0x1f800000) overlaps map (type 18 0x21400000:0x1000) E/TC:0 0 Panic at core/mm/core_mmu.c:413 <check_phys_mem_is_outside> E/TC:0 0 TEE load address @ 0x20000000 E/TC:0 0 Call stack: E/TC:0 0 0x20005655 print_kernel_stack at core/arch/arm/kernel/unwind_arm32.c:109 E/TC:0 0 0x2001c52d __do_panic at core/kernel/panic.c:80 E/TC:0 0 0x200276c1 check_phys_mem_is_outside at core/mm/core_mmu.c:413 E/TC:0 0 0x2002780f core_mmu_set_discovered_nsec_ddr at core/mm/core_mmu.c:481 E/TC:0 0 0x200050b3 discover_nsec_memory at core/arch/arm/kernel/boot.c:1055 E/TC:0 0 0x20005247 boot_init_primary_late at core/arch/arm/kernel/boot.c:1210 E/TC:0 0 0x200001fc reset_primary at core/arch/arm/kernel/entry_a32.S:532
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
2afd9b15 |
| 27-Mar-2023 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable nvmem support
Enable nvmem support to allow reading hardware unique key from the fuses.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Thomas Perrot <thoma
plat-sam: enable nvmem support
Enable nvmem support to allow reading hardware unique key from the fuses.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
a39a15f3 |
| 08-Dec-2023 |
Thomas Perrot <thomas.perrot@bootlin.com> |
plat-sam: force CFG_EXTERNAL_DT to n
Because this feature isn't used on SAM platforms and to disable DT insecure warning.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Acked-by: Jens Wik
plat-sam: force CFG_EXTERNAL_DT to n
Because this feature isn't used on SAM platforms and to disable DT insecure warning.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
8b78beb4 |
| 15-Dec-2022 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable pinctrl and atmel_pio driver for wlsom1 board
The board will need these options to apply I2C pin muxing in order to communicate with the PMIC.
Signed-off-by: Clément Léger <clement
plat-sam: enable pinctrl and atmel_pio driver for wlsom1 board
The board will need these options to apply I2C pin muxing in order to communicate with the PMIC.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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| #
a8c290bd |
| 23-Feb-2023 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable CFG_DRIVERS_GPIO for sama5d27_wlsom1_ek flavor
The PMIC present on this board will needs to access a GPIOs to enter low power mode.
Signed-off-by: Clément Léger <clement.leger@boot
plat-sam: enable CFG_DRIVERS_GPIO for sama5d27_wlsom1_ek flavor
The PMIC present on this board will needs to access a GPIOs to enter low power mode.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
f9e37006 |
| 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable use of SCMI generic clock support
All clocks for the plat-sam are described using the clk framework. Enable this option to allow using them with SCMI transparently.
Signed-off-by:
plat-sam: enable use of SCMI generic clock support
All clocks for the plat-sam are described using the clk framework. Enable this option to allow using them with SCMI transparently.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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| #
65873b54 |
| 14-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: add support for CFG_SCMI_MSG_SMT_FASTCALL_ENTRY
Add necessary calls to scmi_smt_fastcall_smc_entry from sm_platform handler to be able to do SCMI calls via SMC.
Signed-off-by: Clément Lég
plat-sam: add support for CFG_SCMI_MSG_SMT_FASTCALL_ENTRY
Add necessary calls to scmi_smt_fastcall_smc_entry from sm_platform handler to be able to do SCMI calls via SMC.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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| #
3ae16402 |
| 06-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: add SCMI server foundation
Add foundations for SCMI server support. This will be used to expose clocks and regulators to non-secure world.
Signed-off-by: Clément Léger <clement.leger@boot
plat-sam: add SCMI server foundation
Add foundations for SCMI server support. This will be used to expose clocks and regulators to non-secure world.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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| #
39f10025 |
| 15-Dec-2022 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable CFG_DRIVERS_I2C and CFG_ATMEL_I2C for wlsom1 board
Enable these options to embed the I2C driver when using the wlsom1 board.
Signed-off-by: Clément Léger <clement.leger@bootlin.com
plat-sam: enable CFG_DRIVERS_I2C and CFG_ATMEL_I2C for wlsom1 board
Enable these options to embed the I2C driver when using the wlsom1 board.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
a4186cf5 |
| 06-Jan-2023 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: add support for sama5d27-wlsom1-ek board
Add support for PLATFORM_FLAVOR=sama5d27_wlsom1_ek and use the correct debug console (UART0) for that platform.
Signed-off-by: Clément Léger <clem
plat-sam: add support for sama5d27-wlsom1-ek board
Add support for PLATFORM_FLAVOR=sama5d27_wlsom1_ek and use the correct debug console (UART0) for that platform.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
4ebbfa74 |
| 02-May-2022 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable CFG_ATMEL_TCB
Enable CFG_ATMEL_TCB to use the TCB as a time source instead of CFG_SECURE_TIME_SOURCE_REE.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Cl
plat-sam: enable CFG_ATMEL_TCB
Enable CFG_ATMEL_TCB to use the TCB as a time source instead of CFG_SECURE_TIME_SOURCE_REE.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
b04758f2 |
| 29-Apr-2022 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable CFG_ATMEL_PIOBU by default
By default, enable CFG_ATMEL_PIOBU driver on plat-sam.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.foriss
plat-sam: enable CFG_ATMEL_PIOBU by default
By default, enable CFG_ATMEL_PIOBU driver on plat-sam.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
0f6bd1dd |
| 16-Feb-2022 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable RTC support
Enable RTC API, RTC PTA and Atmel RTC driver for sama5d2.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
plat-sam: enable RTC support
Enable RTC API, RTC PTA and Atmel RTC driver for sama5d2.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
73d89627 |
| 14-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable watchdog support in configuration
Enable watchdog support and watchdog SMC handler. Set the watchdog SMC id to 0x2000500 (SiP SMC with func id 0x500).
Acked-by: Jens Wiklander <jen
plat-sam: enable watchdog support in configuration
Enable watchdog support and watchdog SMC handler. Set the watchdog SMC id to 0x2000500 (SiP SMC with func id 0x500).
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
75786993 |
| 20-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: disable CFG_CORE_HAS_GENERIC_TIMER
sama5d2 platform does not have support for the ARM generic timer extension. Disable CFG_CORE_HAS_GENERIC_TIMER and implement plat_get_freq() using device
plat-sam: disable CFG_CORE_HAS_GENERIC_TIMER
sama5d2 platform does not have support for the ARM generic timer extension. Disable CFG_CORE_HAS_GENERIC_TIMER and implement plat_get_freq() using device-tree. Since clocks are probed early in the boot process, the udelay function can be used at driver probe time but not before clock probing of course.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
edc27b84 |
| 07-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: add sm_platform_handler() stub
Add sm_platform_handler() to handle SMC. For the moment, this is stubbed and will allow to handle SiP specific SMC.
Acked-by: Jens Wiklander <jens.wiklander
plat-sam: add sm_platform_handler() stub
Add sm_platform_handler() to handle SMC. For the moment, this is stubbed and will allow to handle SiP specific SMC.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
54c0b326 |
| 02-Jul-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: atmel_saic: add SAIC driver
Add a driver to handle interrupt that are targeting the secure interrupt controller. This driver will be used to handle watchdog and matrix interrupts.
Acked-by
drivers: atmel_saic: add SAIC driver
Add a driver to handle interrupt that are targeting the secure interrupt controller. This driver will be used to handle watchdog and matrix interrupts.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
d031d1ec |
| 10-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
drivers: atmel_shdwc: add call to suspend init
Since there is no "suspend" controller per se and that the general controller used for suspend is the shutdown controller, call suspend init from shdwc
drivers: atmel_shdwc: add call to suspend init
Since there is no "suspend" controller per se and that the general controller used for suspend is the shutdown controller, call suspend init from shdwc driver.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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