arm/plat-stm32mp1/conf.mk

73 $(call force,CFG_STM32_CRYP,n)
74 $(call force,CFG_STM32_SAES,n)
78 $(call force,CFG_HWRNG_PTA,n)
79 $(call force,CFG_WITH_SOFTWARE_PRNG,y)
88 $(call force,CFG_STM32MP13,y)
92 $(call force,CFG_STM32MP15,y)
103 $(call force,CFG_STM32MP15,n)
105 $(call force,CFG_STM32MP15,y)
106 $(call force,CFG_STM32MP13,n)
108 ifeq ($(call cfg-one-enabled,CFG_STM32MP15 CFG_STM32MP13),n)
111 ifeq ($(call cfg-all-enabled,CFG_STM32MP15 CFG_STM32MP13),y)
117 $(call force,CFG_DRIVERS_CLK,y)
118 $(call force,CFG_DRIVERS_CLK_DT,y)
119 $(call force,CFG_DRIVERS_GPIO,y)
120 $(call force,CFG_DRIVERS_PINCTRL,y)
121 $(call force,CFG_DRIVERS_REGULATOR,y)
122 $(call force,CFG_GIC,y)
123 $(call force,CFG_INIT_CNTVOFF,y)
124 $(call force,CFG_PSCI_ARM32,y)
125 $(call force,CFG_REGULATOR_FIXED,y)
126 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
127 $(call force,CFG_SM_PLATFORM_HANDLER,y)
128 $(call force,CFG_STM32_SHARED_IO,y)
131 $(call force,CFG_BOOT_SECONDARY_REQUEST,n)
132 $(call force,CFG_CORE_ASYNC_NOTIF,y)
133 $(call force,CFG_CORE_ASYNC_NOTIF_GIC_INTID,31)
134 $(call force,CFG_CORE_RESERVED_SHM,n)
135 $(call force,CFG_DRIVERS_CLK_FIXED,y)
136 $(call force,CFG_SCMI_MSG_PERF_DOMAIN,y)
137 $(call force,CFG_SECONDARY_INIT_CNTFRQ,n)
138 $(call force,CFG_STM32_GPIO,y)
139 $(call force,CFG_STM32_VREFBUF,y)
140 $(call force,CFG_STM32MP_CLK_CORE,y)
141 $(call force,CFG_STM32MP1_RSTCTRL,y)
142 $(call force,CFG_STM32MP13_CLK,y)
143 $(call force,CFG_STM32MP13_REGULATOR_IOD,y)
144 $(call force,CFG_TEE_CORE_NB_CORE,1)
145 $(call force,CFG_WITH_NSEC_GPIOS,n)
155 $(call force,CFG_BOOT_SECONDARY_REQUEST,y)
156 $(call force,CFG_DRIVERS_CLK_FIXED,n)
157 $(call force,CFG_HALT_CORES_SGI,15)
158 $(call force,CFG_SCMI_MSG_PERF_DOMAIN,n)
159 $(call force,CFG_SECONDARY_INIT_CNTFRQ,y)
160 $(call force,CFG_STM32_PKA,n)
161 $(call force,CFG_STM32_SAES,n)
162 $(call force,CFG_STM32MP1_RSTCTRL,y)
163 $(call force,CFG_STM32MP15_CLK,y)
214 $(call force,CFG_STM32MP1_SCMI_SHM_BASE,0x2ffff000)
219 $(call force,CFG_STM32MP1_SCMI_SHM_SIZE,0x1000)
265 $(call force,CFG_STM32_RNG,y,Required by HW RNG when CFG_WITH_SOFTWARE_PRNG=n)
269 $(call force,CFG_STM32_I2C,y)
270 $(call force,CFG_STM32_GPIO,y)
274 ifeq ($(call cfg-one-enabled, CFG_STM32_CRYP \
278 $(call force,CFG_STM32_CRYPTO_DRIVER,y)
282 $(eval $(call cfg-depends-all,CFG_STM32_RSTCTRL,CFG_DRIVERS_RSTCTRL))
287 $(eval $(call cfg-depends-all,CFG_STM32_IWDG,CFG_WDT_SM_HANDLER CFG_WDT))
301 $(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_STM32MP1_SCMI_SIP)
302 $(call force,CFG_SCMI_MSG_SMT,y,Mandated by CFG_STM32MP1_SCMI_SIP)
303 $(call force,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,y,Mandated by CFG_STM32MP1_SCMI_SIP)
309 $(call force,CFG_STM32_BSEC,y,Mandated by CFG_BSEC_PTA)
319 $(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_SCMI_PTA)
328 $(call force,CFG_SCMI_SCPFW_PRODUCT,stm32mp1)
333 $(call force,CFG_SCMI_MSG_CLOCK,y)
334 $(call force,CFG_SCMI_MSG_RESET_DOMAIN,y)
338 $(call force,CFG_SCMI_MSG_VOLTAGE_DOMAIN,y)
345 $(call force,CFG_STM32_RNG,y,Mandated by CFG_HWRNG_PTA)
346 $(call force,CFG_WITH_SOFTWARE_PRNG,n,Mandated by CFG_HWRNG_PTA)
347 $(call force,CFG_HWRNG_QUALITY,1024)
404 $(call force,CFG_STM32MP15_HUK_BSEC_KEY_0,CFG_STM32MP15_HUK_OTP_BASE)
405 $(call force,CFG_STM32MP15_HUK_BSEC_KEY_1,(CFG_STM32MP15_HUK_OTP_BASE + 1))
406 $(call force,CFG_STM32MP15_HUK_BSEC_KEY_2,(CFG_STM32MP15_HUK_OTP_BASE + 2))
407 $(call force,CFG_STM32MP15_HUK_BSEC_KEY_3,(CFG_STM32MP15_HUK_OTP_BASE + 3))
425 ifneq (y,$(call cfg-one-enabled,CFG_STM32MP15_HUK_BSEC_KEY CFG_STM32MP15_HUK_BSEC_DERIVE_UID))
436 ifeq ($(call cfg-all-enabled,CFG_STM32MP15 CFG_STM32MP13),y)
442 $(call force,CFG_DRIVERS_FIREWALL,y)
450 $(call force,CFG_DRIVERS_RTC,y)
451 $(call force,CFG_RTC_PTA,y)