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Searched refs:SCLK_SPDIF (Results 1 – 25 of 32) sorted by relevance

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/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3036-cru.h28 #define SCLK_SPDIF 83 macro
H A Dexynos7420-clk.h122 #define SCLK_SPDIF 27 macro
H A Drk3188-cru-common.h35 #define SCLK_SPDIF 78 macro
H A Drk3128-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3228-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3288-cru.h36 #define SCLK_SPDIF 83 macro
H A Drk3328-cru.h35 #define SCLK_SPDIF 46 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3036-cru.h27 #define SCLK_SPDIF 83 macro
H A Dexynos7-clk.h119 #define SCLK_SPDIF 27 macro
H A Ds5pv210.h187 #define SCLK_SPDIF 165 macro
H A Drk3188-cru-common.h34 #define SCLK_SPDIF 78 macro
H A Drk3128-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3228-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3328-cru.h35 #define SCLK_SPDIF 46 macro
H A Drk3288-cru.h38 #define SCLK_SPDIF 83 macro
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3036.c172 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, 0,
H A Dclk-rk3128.c184 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3228.c197 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3188.c257 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3328.c251 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, CLK_SET_RATE_PARENT,
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drk3036.dtsi414 clocks = <&cru SCLK_SPDIF>, <&cru SCLK_SPDIF>;
H A Drk3188.dtsi192 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-s5pv210.c669 GATE(SCLK_SPDIF, "sclk_spdif", "mout_spdif", CLK_SRC_MASK0, 27,
H A Dclk-exynos7.c798 GATE(SCLK_SPDIF, "sclk_spdif_user", "sclk_spdif",
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3188.dtsi95 clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;

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