| /OK3568_Linux_fs/kernel/drivers/clk/zte/ |
| H A D | clk-zx296702.c | 46 #define CLK_UART0 (lsp1crpm_base + 0x20) macro 688 ARRAY_SIZE(uart_wclk_sel), CLK_UART0, 4, 1); in zx296702_lsp1_clocks_init() 692 zx_gate("uart0_wclk", "uart0_wclk_mux", CLK_UART0, 31); in zx296702_lsp1_clocks_init() 694 zx_gate("uart0_pclk", "lsp1_apb_pclk", CLK_UART0, 0); in zx296702_lsp1_clocks_init()
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| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 36 #define CLK_UART0 257 macro
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| H A D | actions,s500-cmu.h | 58 #define CLK_UART0 38 macro
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| H A D | actions,s700-cmu.h | 58 #define CLK_UART0 36 macro
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| H A D | actions,s900-cmu.h | 85 #define CLK_UART0 67 macro
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| H A D | pistachio-clk.h | 39 #define CLK_UART0 48 macro
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| H A D | exynos5250.h | 92 #define CLK_UART0 289 macro
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| H A D | s5pv210.h | 161 #define CLK_UART0 143 macro
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| H A D | exynos4.h | 150 #define CLK_UART0 312 macro
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| H A D | exynos5420.h | 66 #define CLK_UART0 257 macro
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| H A D | exynos3250.h | 222 #define CLK_UART0 216 macro
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| H A D | sprd,sc9860-clk.h | 85 #define CLK_UART0 2 macro
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| H A D | rv1106-cru.h | 176 #define CLK_UART0 171 macro
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| H A D | rk3528-cru.h | 406 #define CLK_UART0 536 macro
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | exynos5410-clock.txt | 48 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
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| H A D | exynos3250-clock.txt | 55 clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
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| /OK3568_Linux_fs/kernel/drivers/clk/samsung/ |
| H A D | clk-exynos5410.c | 197 GATE(CLK_UART0, "uart0", "aclk66", GATE_IP_PERIC, 0, 0, 0),
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| /OK3568_Linux_fs/kernel/drivers/clk/pistachio/ |
| H A D | clk-pistachio.c | 35 GATE(CLK_UART0, "uart0", "uart0_div", 0x104, 16),
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| /OK3568_Linux_fs/u-boot/include/dt-bindings/clock/ |
| H A D | rv1106-cru.h | 177 #define CLK_UART0 171 macro
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| H A D | rk3528-cru.h | 413 #define CLK_UART0 536 macro
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | s5pv210.dtsi | 324 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
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| H A D | exynos5410.dtsi | 344 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/actions/ |
| H A D | s700.dtsi | 119 clocks = <&cmu CLK_UART0>;
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| H A D | s900.dtsi | 125 clocks = <&cmu CLK_UART0>;
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/sprd/ |
| H A D | whale2.dtsi | 80 <&ap_clk CLK_UART0>, <&ext_26m>;
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