1*4882a593Smuzhiyun* Samsung Exynos3250 Clock Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Exynos3250 clock controller generates and supplies clock to various 4*4882a593Smuzhiyuncontrollers within the Exynos3250 SoC. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired Properties: 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- compatible: should be one of the following. 9*4882a593Smuzhiyun - "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC. 10*4882a593Smuzhiyun - "samsung,exynos3250-cmu-dmc" - controller compatible with 11*4882a593Smuzhiyun Exynos3250 SoC for Dynamic Memory Controller domain. 12*4882a593Smuzhiyun - "samsung,exynos3250-cmu-isp" - ISP block clock controller compatible 13*4882a593Smuzhiyun with Exynos3250 SOC 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 16*4882a593Smuzhiyun region. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- #clock-cells: should be 1. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunEach clock is assigned an identifier and client nodes can use this identifier 21*4882a593Smuzhiyunto specify the clock which they consume. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunAll available clocks are defined as preprocessor macros in 24*4882a593Smuzhiyundt-bindings/clock/exynos3250.h header and can be used in device 25*4882a593Smuzhiyuntree sources. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunExample 1: Examples of clock controller nodes are listed below. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun cmu: clock-controller@10030000 { 30*4882a593Smuzhiyun compatible = "samsung,exynos3250-cmu"; 31*4882a593Smuzhiyun reg = <0x10030000 0x20000>; 32*4882a593Smuzhiyun #clock-cells = <1>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun cmu_dmc: clock-controller@105c0000 { 36*4882a593Smuzhiyun compatible = "samsung,exynos3250-cmu-dmc"; 37*4882a593Smuzhiyun reg = <0x105C0000 0x2000>; 38*4882a593Smuzhiyun #clock-cells = <1>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun cmu_isp: clock-controller@10048000 { 42*4882a593Smuzhiyun compatible = "samsung,exynos3250-cmu-isp"; 43*4882a593Smuzhiyun reg = <0x10048000 0x1000>; 44*4882a593Smuzhiyun #clock-cells = <1>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunExample 2: UART controller node that consumes the clock generated by the clock 48*4882a593Smuzhiyun controller. Refer to the standard clock bindings for information 49*4882a593Smuzhiyun about 'clocks' and 'clock-names' property. 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun serial@13800000 { 52*4882a593Smuzhiyun compatible = "samsung,exynos4210-uart"; 53*4882a593Smuzhiyun reg = <0x13800000 0x100>; 54*4882a593Smuzhiyun interrupts = <0 109 0>; 55*4882a593Smuzhiyun clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>; 56*4882a593Smuzhiyun clock-names = "uart", "clk_uart_baud0"; 57*4882a593Smuzhiyun }; 58