1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Samsung's S5PV210 SoC device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Mateusz Krawczuk <m.krawczuk@partner.samsung.com> 8*4882a593Smuzhiyun * Tomasz Figa <t.figa@samsung.com> 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 11*4882a593Smuzhiyun * based board files can include this file and provide values for board specfic 12*4882a593Smuzhiyun * bindings. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * Note: This file does not include device nodes for all the controllers in 15*4882a593Smuzhiyun * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional 16*4882a593Smuzhiyun * nodes can be added to this file. 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun#include <dt-bindings/clock/s5pv210.h> 20*4882a593Smuzhiyun#include <dt-bindings/clock/s5pv210-audss.h> 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun/ { 23*4882a593Smuzhiyun #address-cells = <1>; 24*4882a593Smuzhiyun #size-cells = <1>; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun aliases { 27*4882a593Smuzhiyun csis0 = &csis0; 28*4882a593Smuzhiyun dmc0 = &dmc0; 29*4882a593Smuzhiyun dmc1 = &dmc1; 30*4882a593Smuzhiyun fimc0 = &fimc0; 31*4882a593Smuzhiyun fimc1 = &fimc1; 32*4882a593Smuzhiyun fimc2 = &fimc2; 33*4882a593Smuzhiyun i2c0 = &i2c0; 34*4882a593Smuzhiyun i2c1 = &i2c1; 35*4882a593Smuzhiyun i2c2 = &i2c2; 36*4882a593Smuzhiyun i2s0 = &i2s0; 37*4882a593Smuzhiyun i2s1 = &i2s1; 38*4882a593Smuzhiyun i2s2 = &i2s2; 39*4882a593Smuzhiyun pinctrl0 = &pinctrl0; 40*4882a593Smuzhiyun spi0 = &spi0; 41*4882a593Smuzhiyun spi1 = &spi1; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun cpus { 45*4882a593Smuzhiyun #address-cells = <1>; 46*4882a593Smuzhiyun #size-cells = <0>; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun cpu@0 { 49*4882a593Smuzhiyun device_type = "cpu"; 50*4882a593Smuzhiyun compatible = "arm,cortex-a8"; 51*4882a593Smuzhiyun reg = <0>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun xxti: oscillator-0 { 56*4882a593Smuzhiyun compatible = "fixed-clock"; 57*4882a593Smuzhiyun clock-frequency = <0>; 58*4882a593Smuzhiyun clock-output-names = "xxti"; 59*4882a593Smuzhiyun #clock-cells = <0>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun xusbxti: oscillator-1 { 63*4882a593Smuzhiyun compatible = "fixed-clock"; 64*4882a593Smuzhiyun clock-frequency = <0>; 65*4882a593Smuzhiyun clock-output-names = "xusbxti"; 66*4882a593Smuzhiyun #clock-cells = <0>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun soc { 70*4882a593Smuzhiyun compatible = "simple-bus"; 71*4882a593Smuzhiyun #address-cells = <1>; 72*4882a593Smuzhiyun #size-cells = <1>; 73*4882a593Smuzhiyun ranges; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun onenand: onenand@b0600000 { 76*4882a593Smuzhiyun compatible = "samsung,s5pv210-onenand"; 77*4882a593Smuzhiyun reg = <0xb0600000 0x2000>, 78*4882a593Smuzhiyun <0xb0000000 0x20000>, 79*4882a593Smuzhiyun <0xb0040000 0x20000>; 80*4882a593Smuzhiyun interrupt-parent = <&vic1>; 81*4882a593Smuzhiyun interrupts = <31>; 82*4882a593Smuzhiyun clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 83*4882a593Smuzhiyun clock-names = "bus", "onenand"; 84*4882a593Smuzhiyun #address-cells = <1>; 85*4882a593Smuzhiyun #size-cells = <1>; 86*4882a593Smuzhiyun status = "disabled"; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun chipid@e0000000 { 90*4882a593Smuzhiyun compatible = "samsung,s5pv210-chipid"; 91*4882a593Smuzhiyun reg = <0xe0000000 0x1000>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun clocks: clock-controller@e0100000 { 95*4882a593Smuzhiyun compatible = "samsung,s5pv210-clock"; 96*4882a593Smuzhiyun reg = <0xe0100000 0x10000>; 97*4882a593Smuzhiyun clock-names = "xxti", "xusbxti"; 98*4882a593Smuzhiyun clocks = <&xxti>, <&xusbxti>; 99*4882a593Smuzhiyun #clock-cells = <1>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun pmu_syscon: syscon@e0108000 { 103*4882a593Smuzhiyun compatible = "samsung-s5pv210-pmu", "syscon"; 104*4882a593Smuzhiyun reg = <0xe0108000 0x8000>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun pinctrl0: pinctrl@e0200000 { 108*4882a593Smuzhiyun compatible = "samsung,s5pv210-pinctrl"; 109*4882a593Smuzhiyun reg = <0xe0200000 0x1000>; 110*4882a593Smuzhiyun interrupt-parent = <&vic0>; 111*4882a593Smuzhiyun interrupts = <30>; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun wakeup-interrupt-controller { 114*4882a593Smuzhiyun compatible = "samsung,s5pv210-wakeup-eint"; 115*4882a593Smuzhiyun interrupts = <16>; 116*4882a593Smuzhiyun interrupt-parent = <&vic0>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun pdma0: dma@e0900000 { 121*4882a593Smuzhiyun compatible = "arm,pl330", "arm,primecell"; 122*4882a593Smuzhiyun reg = <0xe0900000 0x1000>; 123*4882a593Smuzhiyun interrupt-parent = <&vic0>; 124*4882a593Smuzhiyun interrupts = <19>; 125*4882a593Smuzhiyun clocks = <&clocks CLK_PDMA0>; 126*4882a593Smuzhiyun clock-names = "apb_pclk"; 127*4882a593Smuzhiyun #dma-cells = <1>; 128*4882a593Smuzhiyun #dma-channels = <8>; 129*4882a593Smuzhiyun #dma-requests = <32>; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun pdma1: dma@e0a00000 { 133*4882a593Smuzhiyun compatible = "arm,pl330", "arm,primecell"; 134*4882a593Smuzhiyun reg = <0xe0a00000 0x1000>; 135*4882a593Smuzhiyun interrupt-parent = <&vic0>; 136*4882a593Smuzhiyun interrupts = <20>; 137*4882a593Smuzhiyun clocks = <&clocks CLK_PDMA1>; 138*4882a593Smuzhiyun clock-names = "apb_pclk"; 139*4882a593Smuzhiyun #dma-cells = <1>; 140*4882a593Smuzhiyun #dma-channels = <8>; 141*4882a593Smuzhiyun #dma-requests = <32>; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun adc: adc@e1700000 { 145*4882a593Smuzhiyun compatible = "samsung,s5pv210-adc"; 146*4882a593Smuzhiyun reg = <0xe1700000 0x1000>; 147*4882a593Smuzhiyun interrupt-parent = <&vic2>; 148*4882a593Smuzhiyun interrupts = <23>, <24>; 149*4882a593Smuzhiyun clocks = <&clocks CLK_TSADC>; 150*4882a593Smuzhiyun clock-names = "adc"; 151*4882a593Smuzhiyun #io-channel-cells = <1>; 152*4882a593Smuzhiyun io-channel-ranges; 153*4882a593Smuzhiyun status = "disabled"; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun spi0: spi@e1300000 { 157*4882a593Smuzhiyun compatible = "samsung,s5pv210-spi"; 158*4882a593Smuzhiyun reg = <0xe1300000 0x1000>; 159*4882a593Smuzhiyun interrupt-parent = <&vic1>; 160*4882a593Smuzhiyun interrupts = <15>; 161*4882a593Smuzhiyun dmas = <&pdma0 7>, <&pdma0 6>; 162*4882a593Smuzhiyun dma-names = "tx", "rx"; 163*4882a593Smuzhiyun clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; 164*4882a593Smuzhiyun clock-names = "spi", "spi_busclk0"; 165*4882a593Smuzhiyun pinctrl-names = "default"; 166*4882a593Smuzhiyun pinctrl-0 = <&spi0_bus>; 167*4882a593Smuzhiyun #address-cells = <1>; 168*4882a593Smuzhiyun #size-cells = <0>; 169*4882a593Smuzhiyun status = "disabled"; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun spi1: spi@e1400000 { 173*4882a593Smuzhiyun compatible = "samsung,s5pv210-spi"; 174*4882a593Smuzhiyun reg = <0xe1400000 0x1000>; 175*4882a593Smuzhiyun interrupt-parent = <&vic1>; 176*4882a593Smuzhiyun interrupts = <16>; 177*4882a593Smuzhiyun dmas = <&pdma1 7>, <&pdma1 6>; 178*4882a593Smuzhiyun dma-names = "tx", "rx"; 179*4882a593Smuzhiyun clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; 180*4882a593Smuzhiyun clock-names = "spi", "spi_busclk0"; 181*4882a593Smuzhiyun pinctrl-names = "default"; 182*4882a593Smuzhiyun pinctrl-0 = <&spi1_bus>; 183*4882a593Smuzhiyun #address-cells = <1>; 184*4882a593Smuzhiyun #size-cells = <0>; 185*4882a593Smuzhiyun status = "disabled"; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun keypad: keypad@e1600000 { 189*4882a593Smuzhiyun compatible = "samsung,s5pv210-keypad"; 190*4882a593Smuzhiyun reg = <0xe1600000 0x1000>; 191*4882a593Smuzhiyun interrupt-parent = <&vic2>; 192*4882a593Smuzhiyun interrupts = <25>; 193*4882a593Smuzhiyun clocks = <&clocks CLK_KEYIF>; 194*4882a593Smuzhiyun clock-names = "keypad"; 195*4882a593Smuzhiyun status = "disabled"; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun i2c0: i2c@e1800000 { 199*4882a593Smuzhiyun compatible = "samsung,s3c2440-i2c"; 200*4882a593Smuzhiyun reg = <0xe1800000 0x1000>; 201*4882a593Smuzhiyun interrupt-parent = <&vic1>; 202*4882a593Smuzhiyun interrupts = <14>; 203*4882a593Smuzhiyun clocks = <&clocks CLK_I2C0>; 204*4882a593Smuzhiyun clock-names = "i2c"; 205*4882a593Smuzhiyun pinctrl-names = "default"; 206*4882a593Smuzhiyun pinctrl-0 = <&i2c0_bus>; 207*4882a593Smuzhiyun #address-cells = <1>; 208*4882a593Smuzhiyun #size-cells = <0>; 209*4882a593Smuzhiyun status = "disabled"; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun i2c2: i2c@e1a00000 { 213*4882a593Smuzhiyun compatible = "samsung,s3c2440-i2c"; 214*4882a593Smuzhiyun reg = <0xe1a00000 0x1000>; 215*4882a593Smuzhiyun interrupt-parent = <&vic1>; 216*4882a593Smuzhiyun interrupts = <19>; 217*4882a593Smuzhiyun clocks = <&clocks CLK_I2C2>; 218*4882a593Smuzhiyun clock-names = "i2c"; 219*4882a593Smuzhiyun pinctrl-0 = <&i2c2_bus>; 220*4882a593Smuzhiyun pinctrl-names = "default"; 221*4882a593Smuzhiyun #address-cells = <1>; 222*4882a593Smuzhiyun #size-cells = <0>; 223*4882a593Smuzhiyun status = "disabled"; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun clk_audss: clock-controller@eee10000 { 227*4882a593Smuzhiyun compatible = "samsung,s5pv210-audss-clock"; 228*4882a593Smuzhiyun reg = <0xeee10000 0x1000>; 229*4882a593Smuzhiyun clock-names = "hclk", "xxti", 230*4882a593Smuzhiyun "fout_epll", 231*4882a593Smuzhiyun "sclk_audio0"; 232*4882a593Smuzhiyun clocks = <&clocks DOUT_HCLKP>, <&xxti>, 233*4882a593Smuzhiyun <&clocks FOUT_EPLL>, 234*4882a593Smuzhiyun <&clocks SCLK_AUDIO0>; 235*4882a593Smuzhiyun #clock-cells = <1>; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun i2s0: i2s@eee30000 { 239*4882a593Smuzhiyun compatible = "samsung,s5pv210-i2s"; 240*4882a593Smuzhiyun reg = <0xeee30000 0x1000>; 241*4882a593Smuzhiyun interrupt-parent = <&vic2>; 242*4882a593Smuzhiyun interrupts = <16>; 243*4882a593Smuzhiyun dma-names = "tx", "rx", "tx-sec"; 244*4882a593Smuzhiyun dmas = <&pdma1 10>, <&pdma1 9>, <&pdma1 11>; 245*4882a593Smuzhiyun clock-names = "iis", 246*4882a593Smuzhiyun "i2s_opclk0", 247*4882a593Smuzhiyun "i2s_opclk1"; 248*4882a593Smuzhiyun clocks = <&clk_audss CLK_I2S>, 249*4882a593Smuzhiyun <&clk_audss CLK_I2S>, 250*4882a593Smuzhiyun <&clk_audss CLK_DOUT_AUD_BUS>; 251*4882a593Smuzhiyun samsung,idma-addr = <0xc0010000>; 252*4882a593Smuzhiyun pinctrl-names = "default"; 253*4882a593Smuzhiyun pinctrl-0 = <&i2s0_bus>; 254*4882a593Smuzhiyun #sound-dai-cells = <0>; 255*4882a593Smuzhiyun status = "disabled"; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun i2s1: i2s@e2100000 { 259*4882a593Smuzhiyun compatible = "samsung,s3c6410-i2s"; 260*4882a593Smuzhiyun reg = <0xe2100000 0x1000>; 261*4882a593Smuzhiyun interrupt-parent = <&vic2>; 262*4882a593Smuzhiyun interrupts = <17>; 263*4882a593Smuzhiyun dma-names = "tx", "rx"; 264*4882a593Smuzhiyun dmas = <&pdma1 13>, <&pdma1 12>; 265*4882a593Smuzhiyun clock-names = "iis", "i2s_opclk0"; 266*4882a593Smuzhiyun clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; 267*4882a593Smuzhiyun pinctrl-names = "default"; 268*4882a593Smuzhiyun pinctrl-0 = <&i2s1_bus>; 269*4882a593Smuzhiyun #sound-dai-cells = <0>; 270*4882a593Smuzhiyun status = "disabled"; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun i2s2: i2s@e2a00000 { 274*4882a593Smuzhiyun compatible = "samsung,s3c6410-i2s"; 275*4882a593Smuzhiyun reg = <0xe2a00000 0x1000>; 276*4882a593Smuzhiyun interrupt-parent = <&vic2>; 277*4882a593Smuzhiyun interrupts = <18>; 278*4882a593Smuzhiyun dma-names = "tx", "rx"; 279*4882a593Smuzhiyun dmas = <&pdma1 15>, <&pdma1 14>; 280*4882a593Smuzhiyun clock-names = "iis", "i2s_opclk0"; 281*4882a593Smuzhiyun clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; 282*4882a593Smuzhiyun pinctrl-names = "default"; 283*4882a593Smuzhiyun pinctrl-0 = <&i2s2_bus>; 284*4882a593Smuzhiyun #sound-dai-cells = <0>; 285*4882a593Smuzhiyun status = "disabled"; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun pwm: pwm@e2500000 { 289*4882a593Smuzhiyun compatible = "samsung,s5pc100-pwm"; 290*4882a593Smuzhiyun reg = <0xe2500000 0x1000>; 291*4882a593Smuzhiyun interrupt-parent = <&vic0>; 292*4882a593Smuzhiyun interrupts = <21>, <22>, <23>, <24>, <25>; 293*4882a593Smuzhiyun clock-names = "timers"; 294*4882a593Smuzhiyun clocks = <&clocks CLK_PWM>; 295*4882a593Smuzhiyun #pwm-cells = <3>; 296*4882a593Smuzhiyun }; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun watchdog: watchdog@e2700000 { 299*4882a593Smuzhiyun compatible = "samsung,s3c6410-wdt"; 300*4882a593Smuzhiyun reg = <0xe2700000 0x1000>; 301*4882a593Smuzhiyun interrupt-parent = <&vic0>; 302*4882a593Smuzhiyun interrupts = <26>; 303*4882a593Smuzhiyun clock-names = "watchdog"; 304*4882a593Smuzhiyun clocks = <&clocks CLK_WDT>; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun rtc: rtc@e2800000 { 308*4882a593Smuzhiyun compatible = "samsung,s3c6410-rtc"; 309*4882a593Smuzhiyun reg = <0xe2800000 0x100>; 310*4882a593Smuzhiyun interrupt-parent = <&vic0>; 311*4882a593Smuzhiyun interrupts = <28>, <29>; 312*4882a593Smuzhiyun clocks = <&clocks CLK_RTC>; 313*4882a593Smuzhiyun clock-names = "rtc"; 314*4882a593Smuzhiyun status = "disabled"; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun uart0: serial@e2900000 { 318*4882a593Smuzhiyun compatible = "samsung,s5pv210-uart"; 319*4882a593Smuzhiyun reg = <0xe2900000 0x400>; 320*4882a593Smuzhiyun interrupt-parent = <&vic1>; 321*4882a593Smuzhiyun interrupts = <10>; 322*4882a593Smuzhiyun clock-names = "uart", "clk_uart_baud0", 323*4882a593Smuzhiyun "clk_uart_baud1"; 324*4882a593Smuzhiyun clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, 325*4882a593Smuzhiyun <&clocks SCLK_UART0>; 326*4882a593Smuzhiyun status = "disabled"; 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun uart1: serial@e2900400 { 330*4882a593Smuzhiyun compatible = "samsung,s5pv210-uart"; 331*4882a593Smuzhiyun reg = <0xe2900400 0x400>; 332*4882a593Smuzhiyun interrupt-parent = <&vic1>; 333*4882a593Smuzhiyun interrupts = <11>; 334*4882a593Smuzhiyun clock-names = "uart", "clk_uart_baud0", 335*4882a593Smuzhiyun "clk_uart_baud1"; 336*4882a593Smuzhiyun clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, 337*4882a593Smuzhiyun <&clocks SCLK_UART1>; 338*4882a593Smuzhiyun status = "disabled"; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun uart2: serial@e2900800 { 342*4882a593Smuzhiyun compatible = "samsung,s5pv210-uart"; 343*4882a593Smuzhiyun reg = <0xe2900800 0x400>; 344*4882a593Smuzhiyun interrupt-parent = <&vic1>; 345*4882a593Smuzhiyun interrupts = <12>; 346*4882a593Smuzhiyun clock-names = "uart", "clk_uart_baud0", 347*4882a593Smuzhiyun "clk_uart_baud1"; 348*4882a593Smuzhiyun clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, 349*4882a593Smuzhiyun <&clocks SCLK_UART2>; 350*4882a593Smuzhiyun status = "disabled"; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun uart3: serial@e2900c00 { 354*4882a593Smuzhiyun compatible = "samsung,s5pv210-uart"; 355*4882a593Smuzhiyun reg = <0xe2900c00 0x400>; 356*4882a593Smuzhiyun interrupt-parent = <&vic1>; 357*4882a593Smuzhiyun interrupts = <13>; 358*4882a593Smuzhiyun clock-names = "uart", "clk_uart_baud0", 359*4882a593Smuzhiyun "clk_uart_baud1"; 360*4882a593Smuzhiyun clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, 361*4882a593Smuzhiyun <&clocks SCLK_UART3>; 362*4882a593Smuzhiyun status = "disabled"; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun sdhci0: sdhci@eb000000 { 366*4882a593Smuzhiyun compatible = "samsung,s3c6410-sdhci"; 367*4882a593Smuzhiyun reg = <0xeb000000 0x100000>; 368*4882a593Smuzhiyun interrupt-parent = <&vic1>; 369*4882a593Smuzhiyun interrupts = <26>; 370*4882a593Smuzhiyun clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 371*4882a593Smuzhiyun clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, 372*4882a593Smuzhiyun <&clocks SCLK_MMC0>; 373*4882a593Smuzhiyun status = "disabled"; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun sdhci1: sdhci@eb100000 { 377*4882a593Smuzhiyun compatible = "samsung,s3c6410-sdhci"; 378*4882a593Smuzhiyun reg = <0xeb100000 0x100000>; 379*4882a593Smuzhiyun interrupt-parent = <&vic1>; 380*4882a593Smuzhiyun interrupts = <27>; 381*4882a593Smuzhiyun clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 382*4882a593Smuzhiyun clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, 383*4882a593Smuzhiyun <&clocks SCLK_MMC1>; 384*4882a593Smuzhiyun status = "disabled"; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun sdhci2: sdhci@eb200000 { 388*4882a593Smuzhiyun compatible = "samsung,s3c6410-sdhci"; 389*4882a593Smuzhiyun reg = <0xeb200000 0x100000>; 390*4882a593Smuzhiyun interrupt-parent = <&vic1>; 391*4882a593Smuzhiyun interrupts = <28>; 392*4882a593Smuzhiyun clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 393*4882a593Smuzhiyun clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, 394*4882a593Smuzhiyun <&clocks SCLK_MMC2>; 395*4882a593Smuzhiyun status = "disabled"; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun sdhci3: sdhci@eb300000 { 399*4882a593Smuzhiyun compatible = "samsung,s3c6410-sdhci"; 400*4882a593Smuzhiyun reg = <0xeb300000 0x100000>; 401*4882a593Smuzhiyun interrupt-parent = <&vic3>; 402*4882a593Smuzhiyun interrupts = <2>; 403*4882a593Smuzhiyun clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; 404*4882a593Smuzhiyun clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, 405*4882a593Smuzhiyun <&clocks SCLK_MMC3>; 406*4882a593Smuzhiyun status = "disabled"; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun 409*4882a593Smuzhiyun hsotg: hsotg@ec000000 { 410*4882a593Smuzhiyun compatible = "samsung,s3c6400-hsotg"; 411*4882a593Smuzhiyun reg = <0xec000000 0x20000>; 412*4882a593Smuzhiyun interrupt-parent = <&vic1>; 413*4882a593Smuzhiyun interrupts = <24>; 414*4882a593Smuzhiyun clocks = <&clocks CLK_USB_OTG>; 415*4882a593Smuzhiyun clock-names = "otg"; 416*4882a593Smuzhiyun phy-names = "usb2-phy"; 417*4882a593Smuzhiyun phys = <&usbphy 0>; 418*4882a593Smuzhiyun status = "disabled"; 419*4882a593Smuzhiyun }; 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun usbphy: usbphy@ec100000 { 422*4882a593Smuzhiyun compatible = "samsung,s5pv210-usb2-phy"; 423*4882a593Smuzhiyun reg = <0xec100000 0x100>; 424*4882a593Smuzhiyun samsung,pmureg-phandle = <&pmu_syscon>; 425*4882a593Smuzhiyun clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; 426*4882a593Smuzhiyun clock-names = "phy", "ref"; 427*4882a593Smuzhiyun #phy-cells = <1>; 428*4882a593Smuzhiyun status = "disabled"; 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun ehci: ehci@ec200000 { 432*4882a593Smuzhiyun compatible = "samsung,exynos4210-ehci"; 433*4882a593Smuzhiyun reg = <0xec200000 0x100>; 434*4882a593Smuzhiyun interrupts = <23>; 435*4882a593Smuzhiyun interrupt-parent = <&vic1>; 436*4882a593Smuzhiyun clocks = <&clocks CLK_USB_HOST>; 437*4882a593Smuzhiyun clock-names = "usbhost"; 438*4882a593Smuzhiyun #address-cells = <1>; 439*4882a593Smuzhiyun #size-cells = <0>; 440*4882a593Smuzhiyun status = "disabled"; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun port@0 { 443*4882a593Smuzhiyun reg = <0>; 444*4882a593Smuzhiyun phys = <&usbphy 1>; 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun ohci: ohci@ec300000 { 449*4882a593Smuzhiyun compatible = "samsung,exynos4210-ohci"; 450*4882a593Smuzhiyun reg = <0xec300000 0x100>; 451*4882a593Smuzhiyun interrupts = <23>; 452*4882a593Smuzhiyun interrupt-parent = <&vic1>; 453*4882a593Smuzhiyun clocks = <&clocks CLK_USB_HOST>; 454*4882a593Smuzhiyun clock-names = "usbhost"; 455*4882a593Smuzhiyun #address-cells = <1>; 456*4882a593Smuzhiyun #size-cells = <0>; 457*4882a593Smuzhiyun status = "disabled"; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun port@0 { 460*4882a593Smuzhiyun reg = <0>; 461*4882a593Smuzhiyun phys = <&usbphy 1>; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun }; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun mfc: codec@f1700000 { 466*4882a593Smuzhiyun compatible = "samsung,mfc-v5"; 467*4882a593Smuzhiyun reg = <0xf1700000 0x10000>; 468*4882a593Smuzhiyun interrupt-parent = <&vic2>; 469*4882a593Smuzhiyun interrupts = <14>; 470*4882a593Smuzhiyun clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; 471*4882a593Smuzhiyun clock-names = "sclk_mfc", "mfc"; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun vic0: interrupt-controller@f2000000 { 475*4882a593Smuzhiyun compatible = "arm,pl192-vic"; 476*4882a593Smuzhiyun interrupt-controller; 477*4882a593Smuzhiyun reg = <0xf2000000 0x1000>; 478*4882a593Smuzhiyun #interrupt-cells = <1>; 479*4882a593Smuzhiyun }; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun vic1: interrupt-controller@f2100000 { 482*4882a593Smuzhiyun compatible = "arm,pl192-vic"; 483*4882a593Smuzhiyun interrupt-controller; 484*4882a593Smuzhiyun reg = <0xf2100000 0x1000>; 485*4882a593Smuzhiyun #interrupt-cells = <1>; 486*4882a593Smuzhiyun }; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun vic2: interrupt-controller@f2200000 { 489*4882a593Smuzhiyun compatible = "arm,pl192-vic"; 490*4882a593Smuzhiyun interrupt-controller; 491*4882a593Smuzhiyun reg = <0xf2200000 0x1000>; 492*4882a593Smuzhiyun #interrupt-cells = <1>; 493*4882a593Smuzhiyun }; 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun vic3: interrupt-controller@f2300000 { 496*4882a593Smuzhiyun compatible = "arm,pl192-vic"; 497*4882a593Smuzhiyun interrupt-controller; 498*4882a593Smuzhiyun reg = <0xf2300000 0x1000>; 499*4882a593Smuzhiyun #interrupt-cells = <1>; 500*4882a593Smuzhiyun }; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun fimd: fimd@f8000000 { 503*4882a593Smuzhiyun compatible = "samsung,s5pv210-fimd"; 504*4882a593Smuzhiyun interrupt-parent = <&vic2>; 505*4882a593Smuzhiyun reg = <0xf8000000 0x20000>; 506*4882a593Smuzhiyun interrupt-names = "fifo", "vsync", "lcd_sys"; 507*4882a593Smuzhiyun interrupts = <0>, <1>, <2>; 508*4882a593Smuzhiyun clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; 509*4882a593Smuzhiyun clock-names = "sclk_fimd", "fimd"; 510*4882a593Smuzhiyun status = "disabled"; 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun dmc0: dmc@f0000000 { 514*4882a593Smuzhiyun compatible = "samsung,s5pv210-dmc"; 515*4882a593Smuzhiyun reg = <0xf0000000 0x1000>; 516*4882a593Smuzhiyun }; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun dmc1: dmc@f1400000 { 519*4882a593Smuzhiyun compatible = "samsung,s5pv210-dmc"; 520*4882a593Smuzhiyun reg = <0xf1400000 0x1000>; 521*4882a593Smuzhiyun }; 522*4882a593Smuzhiyun 523*4882a593Smuzhiyun g2d: g2d@fa000000 { 524*4882a593Smuzhiyun compatible = "samsung,s5pv210-g2d"; 525*4882a593Smuzhiyun reg = <0xfa000000 0x1000>; 526*4882a593Smuzhiyun interrupt-parent = <&vic2>; 527*4882a593Smuzhiyun interrupts = <9>; 528*4882a593Smuzhiyun clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; 529*4882a593Smuzhiyun clock-names = "sclk_fimg2d", "fimg2d"; 530*4882a593Smuzhiyun }; 531*4882a593Smuzhiyun 532*4882a593Smuzhiyun mdma1: mdma@fa200000 { 533*4882a593Smuzhiyun compatible = "arm,pl330", "arm,primecell"; 534*4882a593Smuzhiyun reg = <0xfa200000 0x1000>; 535*4882a593Smuzhiyun interrupt-parent = <&vic0>; 536*4882a593Smuzhiyun interrupts = <18>; 537*4882a593Smuzhiyun clocks = <&clocks CLK_MDMA>; 538*4882a593Smuzhiyun clock-names = "apb_pclk"; 539*4882a593Smuzhiyun #dma-cells = <1>; 540*4882a593Smuzhiyun #dma-channels = <8>; 541*4882a593Smuzhiyun #dma-requests = <1>; 542*4882a593Smuzhiyun }; 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun rotator: rotator@fa300000 { 545*4882a593Smuzhiyun compatible = "samsung,s5pv210-rotator"; 546*4882a593Smuzhiyun reg = <0xfa300000 0x1000>; 547*4882a593Smuzhiyun interrupt-parent = <&vic2>; 548*4882a593Smuzhiyun interrupts = <4>; 549*4882a593Smuzhiyun clocks = <&clocks CLK_ROTATOR>; 550*4882a593Smuzhiyun clock-names = "rotator"; 551*4882a593Smuzhiyun }; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun i2c1: i2c@fab00000 { 554*4882a593Smuzhiyun compatible = "samsung,s3c2440-i2c"; 555*4882a593Smuzhiyun reg = <0xfab00000 0x1000>; 556*4882a593Smuzhiyun interrupt-parent = <&vic2>; 557*4882a593Smuzhiyun interrupts = <13>; 558*4882a593Smuzhiyun clocks = <&clocks CLK_I2C1>; 559*4882a593Smuzhiyun clock-names = "i2c"; 560*4882a593Smuzhiyun pinctrl-names = "default"; 561*4882a593Smuzhiyun pinctrl-0 = <&i2c1_bus>; 562*4882a593Smuzhiyun #address-cells = <1>; 563*4882a593Smuzhiyun #size-cells = <0>; 564*4882a593Smuzhiyun status = "disabled"; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun camera: camera { 568*4882a593Smuzhiyun compatible = "samsung,fimc", "simple-bus"; 569*4882a593Smuzhiyun pinctrl-names = "default"; 570*4882a593Smuzhiyun pinctrl-0 = <>; 571*4882a593Smuzhiyun clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; 572*4882a593Smuzhiyun clock-names = "sclk_cam0", "sclk_cam1"; 573*4882a593Smuzhiyun #address-cells = <1>; 574*4882a593Smuzhiyun #size-cells = <1>; 575*4882a593Smuzhiyun #clock-cells = <1>; 576*4882a593Smuzhiyun clock-output-names = "cam_a_clkout", "cam_b_clkout"; 577*4882a593Smuzhiyun ranges; 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun csis0: csis@fa600000 { 580*4882a593Smuzhiyun compatible = "samsung,s5pv210-csis"; 581*4882a593Smuzhiyun reg = <0xfa600000 0x4000>; 582*4882a593Smuzhiyun interrupt-parent = <&vic2>; 583*4882a593Smuzhiyun interrupts = <29>; 584*4882a593Smuzhiyun clocks = <&clocks CLK_CSIS>, 585*4882a593Smuzhiyun <&clocks SCLK_CSIS>; 586*4882a593Smuzhiyun clock-names = "clk_csis", 587*4882a593Smuzhiyun "sclk_csis"; 588*4882a593Smuzhiyun bus-width = <4>; 589*4882a593Smuzhiyun status = "disabled"; 590*4882a593Smuzhiyun #address-cells = <1>; 591*4882a593Smuzhiyun #size-cells = <0>; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun fimc0: fimc@fb200000 { 595*4882a593Smuzhiyun compatible = "samsung,s5pv210-fimc"; 596*4882a593Smuzhiyun reg = <0xfb200000 0x1000>; 597*4882a593Smuzhiyun interrupts = <5>; 598*4882a593Smuzhiyun interrupt-parent = <&vic2>; 599*4882a593Smuzhiyun clocks = <&clocks CLK_FIMC0>, 600*4882a593Smuzhiyun <&clocks SCLK_FIMC0>; 601*4882a593Smuzhiyun clock-names = "fimc", 602*4882a593Smuzhiyun "sclk_fimc"; 603*4882a593Smuzhiyun samsung,pix-limits = <4224 8192 1920 4224>; 604*4882a593Smuzhiyun samsung,min-pix-alignment = <16 8>; 605*4882a593Smuzhiyun samsung,cam-if; 606*4882a593Smuzhiyun }; 607*4882a593Smuzhiyun 608*4882a593Smuzhiyun fimc1: fimc@fb300000 { 609*4882a593Smuzhiyun compatible = "samsung,s5pv210-fimc"; 610*4882a593Smuzhiyun reg = <0xfb300000 0x1000>; 611*4882a593Smuzhiyun interrupt-parent = <&vic2>; 612*4882a593Smuzhiyun interrupts = <6>; 613*4882a593Smuzhiyun clocks = <&clocks CLK_FIMC1>, 614*4882a593Smuzhiyun <&clocks SCLK_FIMC1>; 615*4882a593Smuzhiyun clock-names = "fimc", 616*4882a593Smuzhiyun "sclk_fimc"; 617*4882a593Smuzhiyun samsung,pix-limits = <4224 8192 1920 4224>; 618*4882a593Smuzhiyun samsung,min-pix-alignment = <1 1>; 619*4882a593Smuzhiyun samsung,mainscaler-ext; 620*4882a593Smuzhiyun samsung,cam-if; 621*4882a593Smuzhiyun samsung,lcd-wb; 622*4882a593Smuzhiyun }; 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun fimc2: fimc@fb400000 { 625*4882a593Smuzhiyun compatible = "samsung,s5pv210-fimc"; 626*4882a593Smuzhiyun reg = <0xfb400000 0x1000>; 627*4882a593Smuzhiyun interrupt-parent = <&vic2>; 628*4882a593Smuzhiyun interrupts = <7>; 629*4882a593Smuzhiyun clocks = <&clocks CLK_FIMC2>, 630*4882a593Smuzhiyun <&clocks SCLK_FIMC2>; 631*4882a593Smuzhiyun clock-names = "fimc", 632*4882a593Smuzhiyun "sclk_fimc"; 633*4882a593Smuzhiyun samsung,pix-limits = <1920 8192 1280 1920>; 634*4882a593Smuzhiyun samsung,min-pix-alignment = <16 8>; 635*4882a593Smuzhiyun samsung,rotators = <0>; 636*4882a593Smuzhiyun samsung,cam-if; 637*4882a593Smuzhiyun }; 638*4882a593Smuzhiyun }; 639*4882a593Smuzhiyun 640*4882a593Smuzhiyun jpeg_codec: jpeg-codec@fb600000 { 641*4882a593Smuzhiyun compatible = "samsung,s5pv210-jpeg"; 642*4882a593Smuzhiyun reg = <0xfb600000 0x1000>; 643*4882a593Smuzhiyun interrupt-parent = <&vic2>; 644*4882a593Smuzhiyun interrupts = <8>; 645*4882a593Smuzhiyun clocks = <&clocks CLK_JPEG>; 646*4882a593Smuzhiyun clock-names = "jpeg"; 647*4882a593Smuzhiyun }; 648*4882a593Smuzhiyun }; 649*4882a593Smuzhiyun}; 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun#include "s5pv210-pinctrl.dtsi" 652