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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/rkflash/
H A Dnandc.txt17 reg = <0x0 0xff4b0000 0x0 0x4000>;
19 nandc_id = <0>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/
H A Drockchip,nand-controller.yaml56 "^nand@[0-7]$":
60 minimum: 0
134 reg = <0xff4b0000 0x4000>;
141 pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
146 #size-cells = <0>;
148 nand@0 {
149 reg = <0>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Drockchip-mipi-dphy.txt40 0 - autodetect based on other properties (MIPI CSI-2 D-PHY, parallel or Bt656)
71 #size-cells = <0>;
73 port@0 {
74 reg = <0>;
76 #size-cells = <0>;
78 mipi_in_wcam: endpoint@0 {
79 reg = <0>;
104 reg = <0xff4b0000 0x8000>;
111 #size-cells = <0>;
112 port@0 {
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3528/
H A Drk3528.c16 #define FIREWALL_DDR_BASE 0xff2e0000
17 #define FW_DDR_MST1_REG 0x44
18 #define FW_DDR_MST6_REG 0x58
19 #define FW_DDR_MST7_REG 0x5c
20 #define FW_DDR_MST11_REG 0x6c
21 #define FW_DDR_MST14_REG 0x78
22 #define FW_DDR_MST16_REG 0x80
23 #define FW_DDR_MST_REG 0xf0
25 #define VENC_GRF_BASE 0xff320000
26 #define VENC_GRF_CON1 0x4
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rv1106/
H A Drv1106.c20 #define PERI_GRF_BASE 0xff000000
21 #define PERI_GRF_PERI_CON1 0x0004
23 #define CORE_GRF_BASE 0xff040000
24 #define CORE_GRF_CACHE_PERI_ADDR_START 0x0024
25 #define CORE_GRF_CACHE_PERI_ADDR_END 0x0028
26 #define CORE_GRF_MCU_CACHE_MISC 0x002c
28 #define PERI_GRF_BASE 0xff000000
29 #define PERI_GRF_USBPHY_CON0 0x0050
31 #define PERI_SGRF_BASE 0xff070000
32 #define PERI_SGRF_FIREWALL_CON0 0x0020
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3308.dtsi35 #size-cells = <0>;
37 cpu0: cpu@0 {
40 reg = <0x0 0x0>;
47 reg = <0x0 0x1>;
54 reg = <0x0 0x2>;
61 reg = <0x0 0x3>;
79 #clock-cells = <0>;
101 reg = <0x0 0xff010000 0x0 0x10000>;
121 #clock-cells = <0>;
129 reg = <0x0 0xff000000 0x0 0x10000>;
[all …]
H A Drv1106.dtsi55 #size-cells = <0>;
60 reg = <0xf00>;
106 rockchip,wake-irq = <0>;
107 rockchip,irq-mode-enable = <0>;
133 size = <0x800000>;
211 thermal-sensors = <&tsadc 0>;
213 threshold: trip-point-0 {
244 #clock-cells = <0>;
249 reg = <0xff000000 0x68000>;
258 offset = <0x20200>;
[all …]
H A D.rk3308-evb.dtb.dts.tmp
H A Drv1126.dtsi46 #size-cells = <0>;
51 reg = <0xf00>;
61 reg = <0xf01>;
71 reg = <0xf02>;
81 reg = <0xf03>;
94 arm,psci-suspend-param = <0x0010000>;
164 bus-id = <0>;
165 cfg-val = <0x00300020>;
166 enable-msk = <0x7144>;
171 cfg-val = <0x00300020>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3308.dtsi47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0x0 0x0>;
73 reg = <0x0 0x1>;
83 reg = <0x0 0x2>;
93 reg = <0x0 0x3>;
106 arm,psci-suspend-param = <0x0010000>;
123 rockchip,low-temp = <0>;
128 0 1296 50000
136 0 54000 0
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drv1106.dtsi72 #clock-cells = <0>;
76 rkvenc_pvtpll: pvtpll-0 {
80 #clock-cells = <0>;
87 #clock-cells = <0>;
94 #clock-cells = <0>;
100 #size-cells = <0>;
102 cpu0: cpu@0 {
105 reg = <0x0>;
118 rockchip,pvtpll-avg-offset = <0x4001c>;
227 rockchip,wake-irq = <0>;
[all …]
H A Drv1126.dtsi50 #size-cells = <0>;
55 reg = <0xf00>;
67 reg = <0xf01>;
78 reg = <0xf02>;
89 reg = <0xf03>;
103 arm,psci-suspend-param = <0x0010000>;
127 0 5
131 1 0
134 0 100500 1
141 rockchip,pvtm-ch = <0 0>;
[all …]