1Rockchip SoC MIPI RX D-PHY 2------------------------------------------------------------- 3 4Required properties: 5- compatible: value should be one of the following 6 "rockchip,rk1808-mipi-dphy-rx" 7 "rockchip,rk3288-mipi-dphy" 8 "rockchip,rk3326-mipi-dphy" 9 "rockchip,rk3368-mipi-dphy" 10 "rockchip,rk3399-mipi-dphy" 11 "rockchip,rv1126-csi-dphy" 12- clocks : list of clock specifiers, corresponding to entries in 13 clock-names property; 14- clock-names: required clock name. 15 16MIPI RX0 D-PHY use registers in "general register files", it 17should be a child of the GRF. 18MIPI TX1RX1 D-PHY have its own registers, it must have a reg property. 19 20Optional properties: 21- reg: offset and length of the register set for the device. 22- rockchip,grf: MIPI TX1RX1 D-PHY not only has its own register but also 23 the GRF, so it is only necessary for MIPI TX1RX1 D-PHY. 24 25port node 26------------------- 27 28The device node should contain two 'port' child nodes, according to the bindings 29defined in Documentation/devicetree/bindings/media/video-interfaces.txt. 30 31The first port show the sensors connected in this mipi-dphy. 32- endpoint: 33 - remote-endpoint: Linked to a sensor with a MIPI CSI-2 video bus. 34 - data-lanes : (required) an array specifying active physical MIPI-CSI2 35 data input lanes and their mapping to logical lanes; the 36 D-PHY can't reroute lanes, so the array's content should 37 be consecutive and only its length is meaningful. 38 For CCP2, v4l2 fwnode endpoint parse this read by u32. 39 - bus-type: data bus type. Possible values are: 40 0 - autodetect based on other properties (MIPI CSI-2 D-PHY, parallel or Bt656) 41 1 - MIPI CSI-2 C-PHY, no support 42 2 - MIPI CSI1, no support 43 3 - CCP2, using for lvds 44The port node must contain at least one endpoint. It could have multiple endpoints 45linked to different sensors, but please note that they are not supposed to be 46actived at the same time. 47 48The second port should be connected to isp node. 49- endpoint: 50 - remote-endpoint: Linked to Rockchip ISP1, which is defined 51 in rockchip-isp1.txt. 52 53Device node example 54------------------- 55 56grf: syscon@ff770000 { 57 compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; 58 59... 60 61 mipi_dphy_rx0: mipi-dphy-rx0 { 62 compatible = "rockchip,rk3399-mipi-dphy"; 63 clocks = <&cru SCLK_MIPIDPHY_REF>, 64 <&cru SCLK_DPHY_RX0_CFG>, 65 <&cru PCLK_VIO_GRF>; 66 clock-names = "dphy-ref", "dphy-cfg", "grf"; 67 power-domains = <&power RK3399_PD_VIO>; 68 69 ports { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 port@0 { 74 reg = <0>; 75 #address-cells = <1>; 76 #size-cells = <0>; 77 78 mipi_in_wcam: endpoint@0 { 79 reg = <0>; 80 remote-endpoint = <&wcam_out>; 81 data-lanes = <1 2>; 82 }; 83 mipi_in_ucam: endpoint@1 { 84 reg = <1>; 85 remote-endpoint = <&ucam_out>; 86 data-lanes = <1>; 87 }; 88 }; 89 90 port@1 { 91 reg = <1>; 92 93 dphy_rx0_out: endpoint { 94 remote-endpoint = <&isp0_mipi_in>; 95 }; 96 }; 97 }; 98 }; 99}; 100 101example for rv1126 node 102csi_dphy0 { 103 compatible = "rockchip,rv1126-csi-dphy"; 104 reg = <0xff4b0000 0x8000>; 105 clocks = <&cru PCLK_CSIPHY0>; 106 clock-names = "pclk"; 107 rockchip,grf = <&grf>; 108 status = "okay"; 109 ports { 110 #address-cells = <1>; 111 #size-cells = <0>; 112 port@0 { 113 reg = <0>; 114 #address-cells = <1>; 115 #size-cells = <0>; 116 117 mipi_in_ucam0: endpoint@1 { 118 reg = <1>; 119 remote-endpoint = <&ucam_out0>; 120 /*data-lanes = <1 2 3 4>; //for mipi*/ 121 data-lanes = <4>; //for lvds, note: this diff to mipi 122 bus-type = <3>; //for lvds 123 }; 124 }; 125 port@1 { 126 reg = <1>; 127 #address-cells = <1>; 128 #size-cells = <0>; 129 130 csidphy0_out: endpoint@0 { 131 reg = <0>; 132 remote-endpoint = <&isp_in>; 133 }; 134 }; 135 }; 136}; 137