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Searched defs:input_rate (Results 1 – 25 of 27) sorted by relevance

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/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3036.c44 #define RATE_TO_DIV(input_rate, output_rate) \ argument
47 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3066.c90 #define RATE_TO_DIV(input_rate, output_rate) \ argument
93 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3328.c23 #define RATE_TO_DIV(input_rate, output_rate) \ argument
25 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3188.c91 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rv1108.c29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3128.c23 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rv1103b.c23 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk322x.c22 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3399.c44 #define RATE_TO_DIV(input_rate, output_rate) \ argument
46 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3506.c24 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk1808.c30 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rv1106.c23 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rv1126b.c22 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3308.c29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3368.c62 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3588.c22 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3562.c20 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3576.c22 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3528.c21 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_rk3288.c210 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
H A Dclk_px30.c51 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
/rk3399_rockchip-uboot/drivers/clk/aspeed/
H A Dclk_ast2500.c179 static ulong ast2500_calc_clock_config(ulong input_rate, ulong requested_rate, in ast2500_calc_clock_config()
/rk3399_rockchip-uboot/drivers/spi/
H A Drk_spi.c54 uint input_rate; member
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h194 static inline u32 clk_get_divisor(ulong input_rate, uint output_rate) in clk_get_divisor()
/rk3399_rockchip-uboot/arch/arm/mach-exynos/
H A Dclock.c1396 unsigned int fine_scalar_bits, unsigned int input_rate, in clock_calc_best_scalar()

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