| 724ac3e2 | 10-Jan-2020 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8mq): correct the slot ack setting for STOP mode
A53 core's power up ack need to be used when system resume
from DSM mode.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I47fb33c058
feat(imx8mq): correct the slot ack setting for STOP mode
A53 core's power up ack need to be used when system resume
from DSM mode.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I47fb33c0582ae5f483ffaa887f95e27bd47875f7
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| 387a1df1 | 10-Jan-2020 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8mq): add anamix pll override setting for DSM mode
Add the anamix PLL override setting for DSM mode support,
so that the PLL can be power down in DSM mode to save power.
Signed-off-by: Jack
feat(imx8mq): add anamix pll override setting for DSM mode
Add the anamix PLL override setting for DSM mode support,
so that the PLL can be power down in DSM mode to save power.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ibe954bc7c4a7b453ace13f8e4b6a335e6d4856c3
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| 88a26465 | 08-Jan-2020 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8mq): add workaround code for ERR11171 on imx8mq
This new workaround takes advantage of the per core IMR
registers in GPC in order to unmask the IRQ0, still generated
by the 12bit in IOMUX_G
feat(imx8mq): add workaround code for ERR11171 on imx8mq
This new workaround takes advantage of the per core IMR
registers in GPC in order to unmask the IRQ0, still generated
by the 12bit in IOMUX_GPR register (which now remains always set),
so it can only wake up one core at the time.Also, this entire
workaround has now been moved here in TF-A, allowing the kernel
side to be minimal.
Another advantage this workaround brings is the removal of the
50us delay (which was necessary before in gic_raise_softirq in
kernel) by allowing the core that is waking up to mask his own
IRQ0 in the suspend finish callback.
One important change here is the way the cores are woken up in
dram_dvfs_handler. Since the wake up mechanism has changed from
asserting the 12th bit in IOMUX_GPR and leaving the IMR1 1st bit
on for each core to exactly the reverse, that is, leaving the
IOMUX_GPR 12th bit always set and then masking/unmasking the IMR1
1st bit for each independent core, we need to use the imx_gpc_core_wake
to wake up the cores.
Also, the 50us udelay is moved to TF-A (inside imx_pwr_domain_off)
from kernel(gic_raise_softirq), since the new cpuidle workaround
does not need it in order to clean the IOMUX_GPC 12bit. For now,
the udelay seems to be still needed in order to delay the affinity
info OFF for the dying core. This is something that needs further
investigation.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I9f17ff6fc3452b8225a50b232964712aafeab78a
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| dd108c3c | 07-Jan-2020 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8mq): add the dram retention support for imx8mq
Add the dram retention support for i.MX8MQ. As there is
no enough ocram space available before entering TF-A,
so the timing info need to be co
feat(imx8mq): add the dram retention support for imx8mq
Add the dram retention support for i.MX8MQ. As there is
no enough ocram space available before entering TF-A,
so the timing info need to be copied from dram into ocram.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Id8264c342fd62e297b1969cba5ed505450c78a25
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| 8cfa94b7 | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
feat(imx8mq): add BL31 PIE support
Enable PIE support so the BL31 firmware can be loaded from anywhere
within the OCRAM (SRAM). For the PIE support we only need to replace
the BL31_BASE define by th
feat(imx8mq): add BL31 PIE support
Enable PIE support so the BL31 firmware can be loaded from anywhere
within the OCRAM (SRAM). For the PIE support we only need to replace
the BL31_BASE define by the BL31_START symbol which is a relocatable
and we need to enable it by setting ENABLE_PIE := 1.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Ie6a13e4ae0fdc6627a94798d7a86df7d5b310896
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| 0445a4ab | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
refactor(imx8mq): introduce BL31_SIZE
No functional change.
Introduce BL31_SIZE define and calculate the limits based on the
BL31_BASE and the BL31_SIZE define. Also make use of SZ_64K to make
it e
refactor(imx8mq): introduce BL31_SIZE
No functional change.
Introduce BL31_SIZE define and calculate the limits based on the
BL31_BASE and the BL31_SIZE define. Also make use of SZ_64K to make
it easier to read. This is required for later BL31 PIE support since
it drops the calculation based on the BL31_LIMIT and BL31_BASE.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I517074b866b5bf11841b51777f87c926b304488d
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| c0fb8874 | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
refactor(imx8mq): make use of setup_page_tables()
Improve code readability and align with other i.MX8M* platforms.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Ifd29b74872e3a56728
refactor(imx8mq): make use of setup_page_tables()
Improve code readability and align with other i.MX8M* platforms.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Ifd29b74872e3a567288d208de4827403078164e9
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| 36be1086 | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
feat(imx8mq): always set up console
This aligns the i.MX8MQ platform behaviour with the other i.MX8M*
platforms by always setting up the console UART.
Signed-off-by: Lucas Stach <l.stach@pengutroni
feat(imx8mq): always set up console
This aligns the i.MX8MQ platform behaviour with the other i.MX8M*
platforms by always setting up the console UART.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I1279d9cb4feb6e789422b9844cab711b8daae74e
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| 7698dbab | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
feat(imx8mq): remove empty bl31_plat_runtime_setup
Having this empty definition is actively harmful, as it prevents the
default weak function to be used, which does a switch of the console
state.
S
feat(imx8mq): remove empty bl31_plat_runtime_setup
Having this empty definition is actively harmful, as it prevents the
default weak function to be used, which does a switch of the console
state.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I3b78e0c524c4907714036dba573a44d8f9c48b09
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