Home
last modified time | relevance | path

Searched refs:radeon_crtc (Results 1 – 25 of 32) sorted by relevance

12

/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Dradeon_cursor.c35 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_lock_cursor() local
39 cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
44 WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
46 cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
51 WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
53 cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); in radeon_lock_cursor()
58 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
64 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_hide_cursor() local
68 WREG32_IDX(EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
72 WREG32_IDX(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
[all …]
H A Datombios_crtc.c44 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in atombios_overscan_setup() local
51 args.ucCRTC = radeon_crtc->crtc_id; in atombios_overscan_setup()
53 switch (radeon_crtc->rmx_type) { in atombios_overscan_setup()
74 args.usOverscanRight = cpu_to_le16(radeon_crtc->h_border); in atombios_overscan_setup()
75 args.usOverscanLeft = cpu_to_le16(radeon_crtc->h_border); in atombios_overscan_setup()
76 args.usOverscanBottom = cpu_to_le16(radeon_crtc->v_border); in atombios_overscan_setup()
77 args.usOverscanTop = cpu_to_le16(radeon_crtc->v_border); in atombios_overscan_setup()
87 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in atombios_scaler_setup() local
91 to_radeon_encoder(radeon_crtc->encoder); in atombios_scaler_setup()
96 if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id) in atombios_scaler_setup()
[all …]
H A Dradeon_display.c54 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in avivo_crtc_load_lut() local
60 DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); in avivo_crtc_load_lut()
61 WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
63 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
64 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
65 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
67 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
68 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
69 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
71 WREG32(AVIVO_DC_LUT_RW_SELECT, radeon_crtc->crtc_id); in avivo_crtc_load_lut()
[all …]
H A Dradeon_legacy_crtc.c42 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_overscan_setup() local
44 WREG32(RADEON_OVR_CLR + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
45 WREG32(RADEON_OVR_WID_LEFT_RIGHT + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
46 WREG32(RADEON_OVR_WID_TOP_BOTTOM + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
54 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_legacy_rmx_mode_set() local
66 struct drm_display_mode *native_mode = &radeon_crtc->native_mode; in radeon_legacy_rmx_mode_set()
129 switch (radeon_crtc->rmx_type) { in radeon_legacy_rmx_mode_set()
299 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_crtc_dpms() local
305 if (radeon_crtc->crtc_id) in radeon_crtc_dpms()
327 radeon_crtc->enabled = true; in radeon_crtc_dpms()
[all …]
H A Drs600.c120 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rs600_page_flip() local
121 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rs600_page_flip()
126 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rs600_page_flip()
129 WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, in rs600_page_flip()
131 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rs600_page_flip()
133 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rs600_page_flip()
138 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) in rs600_page_flip()
146 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rs600_page_flip()
151 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rs600_page_flip_pending() local
154 return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & in rs600_page_flip_pending()
[all …]
H A Dradeon_legacy_encoders.c189 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_lvds_mode_set() local
227 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_lvds_mode_set()
248 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_lvds_mode_set()
250 radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_lvds_mode_set()
590 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_primary_dac_mode_set() local
596 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_primary_dac_mode_set()
636 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_primary_dac_mode_set()
638 radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_primary_dac_mode_set()
787 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_tmds_int_mode_set() local
854 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_tmds_int_mode_set()
[all …]
H A Dradeon_dp_mst.c333 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_dp_mst_prepare_pll() local
336 struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder); in radeon_dp_mst_prepare_pll()
345 radeon_crtc->bpc = radeon_connector->base.display_info.bpc; in radeon_dp_mst_prepare_pll()
347 radeon_crtc->bpc = 8; in radeon_dp_mst_prepare_pll()
352 radeon_crtc->ss_enabled = in radeon_dp_mst_prepare_pll()
353 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss, in radeon_dp_mst_prepare_pll()
368 struct radeon_crtc *radeon_crtc; in radeon_mst_encoder_dpms() local
395 radeon_crtc = to_radeon_crtc(crtc); in radeon_mst_encoder_dpms()
412 mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id); in radeon_mst_encoder_dpms()
420 dig_enc->linkb, radeon_crtc->crtc_id); in radeon_mst_encoder_dpms()
H A Datombios_encoders.c465 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_atom_get_bpc() local
466 bpc = radeon_crtc->bpc; in radeon_atom_get_bpc()
1059 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_dig_transmitter_setup2() local
1060 pll_id = radeon_crtc->pll_id; in atombios_dig_transmitter_setup2()
1547 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_yuv_setup() local
1563 (radeon_crtc->crtc_id << 18))); in atombios_yuv_setup()
1565 WREG32(reg, (ATOM_S3_CV_ACTIVE | (radeon_crtc->crtc_id << 24))); in atombios_yuv_setup()
1571 args.ucCRTC = radeon_crtc->crtc_id; in atombios_yuv_setup()
1870 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_set_encoder_crtc_source() local
1887 args.v1.ucCRTC = radeon_crtc->crtc_id; in atombios_set_encoder_crtc_source()
[all …]
H A Dradeon_audio.c67 struct radeon_crtc *crtc, unsigned int clock);
69 struct radeon_crtc *crtc, unsigned int clock);
71 struct radeon_crtc *crtc, unsigned int clock);
73 struct radeon_crtc *crtc, unsigned int clock);
75 struct radeon_crtc *crtc, unsigned int clock);
77 struct radeon_crtc *crtc, unsigned int clock);
499 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); in radeon_audio_set_dto()
657 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_hdmi_set_color_depth() local
658 bpc = radeon_crtc->bpc; in radeon_hdmi_set_color_depth()
H A Devergreen.c1300 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in dce4_program_fmt() local
1348 WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp); in dce4_program_fmt()
1421 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in evergreen_page_flip() local
1424 WREG32(EVERGREEN_GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, in evergreen_page_flip()
1426 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, in evergreen_page_flip()
1428 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in evergreen_page_flip()
1431 RREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset); in evergreen_page_flip()
1444 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in evergreen_page_flip_pending() local
1447 return !!(RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & in evergreen_page_flip_pending()
1675 struct radeon_crtc *radeon_crtc; in evergreen_pm_prepare() local
[all …]
H A Dradeon_legacy_tv.c242 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_get_std_mode() local
247 radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc); in radeon_legacy_tv_get_std_mode()
248 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_get_std_mode()
533 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_mode_set() local
550 radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_tv_mode_set()
596 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_mode_set()
599 if (radeon_crtc->rmx_type != RMX_OFF) in radeon_legacy_tv_mode_set()
H A Dradeon_mode.h46 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
247 struct radeon_crtc *crtcs[RADEON_MAX_CRTCS];
327 struct radeon_crtc { struct
942 struct radeon_crtc *radeon_crtc);
944 struct radeon_crtc *radeon_crtc);
959 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
H A Dr600_dpm.c160 struct radeon_crtc *radeon_crtc; in r600_dpm_get_vblank_time() local
166 radeon_crtc = to_radeon_crtc(crtc); in r600_dpm_get_vblank_time()
167 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { in r600_dpm_get_vblank_time()
169 radeon_crtc->hw_mode.crtc_htotal * in r600_dpm_get_vblank_time()
170 (radeon_crtc->hw_mode.crtc_vblank_end - in r600_dpm_get_vblank_time()
171 radeon_crtc->hw_mode.crtc_vdisplay + in r600_dpm_get_vblank_time()
172 (radeon_crtc->v_border * 2)); in r600_dpm_get_vblank_time()
174 vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; in r600_dpm_get_vblank_time()
187 struct radeon_crtc *radeon_crtc; in r600_dpm_get_vrefresh() local
192 radeon_crtc = to_radeon_crtc(crtc); in r600_dpm_get_vrefresh()
[all …]
H A Devergreen_hdmi.c75 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in evergreen_hdmi_update_acr() local
76 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
228 struct radeon_crtc *crtc, unsigned int clock) in dce4_hdmi_audio_set_dto()
271 struct radeon_crtc *crtc, unsigned int clock) in dce4_dp_audio_set_dto()
H A Drv770.c810 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rv770_page_flip() local
811 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rv770_page_flip()
816 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rv770_page_flip()
819 WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, in rv770_page_flip()
821 if (radeon_crtc->crtc_id) { in rv770_page_flip()
828 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rv770_page_flip()
830 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rv770_page_flip()
835 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) in rv770_page_flip()
843 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rv770_page_flip()
848 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rv770_page_flip_pending() local
[all …]
H A Dradeon_device.c1591 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_suspend_kms() local
1595 if (radeon_crtc->cursor_bo) { in radeon_suspend_kms()
1596 struct radeon_bo *robj = gem_to_radeon_bo(radeon_crtc->cursor_bo); in radeon_suspend_kms()
1717 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_resume_kms() local
1719 if (radeon_crtc->cursor_bo) { in radeon_resume_kms()
1720 struct radeon_bo *robj = gem_to_radeon_bo(radeon_crtc->cursor_bo); in radeon_resume_kms()
1728 &radeon_crtc->cursor_addr); in radeon_resume_kms()
H A Dr100.c164 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in r100_page_flip() local
170 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
174 if (RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET) in r100_page_flip()
182 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
197 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in r100_page_flip_pending() local
200 return !!(RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & in r100_page_flip_pending()
453 struct radeon_crtc *radeon_crtc; in r100_pm_prepare() local
458 radeon_crtc = to_radeon_crtc(crtc); in r100_pm_prepare()
459 if (radeon_crtc->enabled) { in r100_pm_prepare()
460 if (radeon_crtc->crtc_id) { in r100_pm_prepare()
[all …]
H A Dradeon_pm.c1676 struct radeon_crtc *radeon_crtc; in radeon_pm_compute_clocks_old() local
1688 radeon_crtc = to_radeon_crtc(crtc); in radeon_pm_compute_clocks_old()
1689 if (radeon_crtc->enabled) { in radeon_pm_compute_clocks_old()
1690 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1749 struct radeon_crtc *radeon_crtc; in radeon_pm_compute_clocks_dpm() local
1764 radeon_crtc = to_radeon_crtc(crtc); in radeon_pm_compute_clocks_dpm()
1766 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1768 if (!radeon_crtc->connector) in radeon_pm_compute_clocks_dpm()
1771 radeon_connector = to_radeon_connector(radeon_crtc->connector); in radeon_pm_compute_clocks_dpm()
H A Dsi.c1972 struct radeon_crtc *radeon_crtc, in dce6_line_buffer_adjust() argument
1977 u32 pipe_offset = radeon_crtc->crtc_id * 0x20; in dce6_line_buffer_adjust()
1991 if (radeon_crtc->base.enabled && mode) { in dce6_line_buffer_adjust()
2004 WREG32(DC_LB_MEMORY_SPLIT + radeon_crtc->crtc_offset, in dce6_line_buffer_adjust()
2016 if (radeon_crtc->base.enabled && mode) { in dce6_line_buffer_adjust()
2299 struct radeon_crtc *radeon_crtc, in dce6_program_watermarks() argument
2302 struct drm_display_mode *mode = &radeon_crtc->base.mode; in dce6_program_watermarks()
2314 if (radeon_crtc->base.enabled && num_heads && mode) { in dce6_program_watermarks()
2346 wm_high.vsc = radeon_crtc->vsc; in dce6_program_watermarks()
2348 if (radeon_crtc->rmx_type != RMX_OFF) in dce6_program_watermarks()
[all …]
H A Ddce6_afmt.c269 struct radeon_crtc *crtc, unsigned int clock) in dce6_hdmi_audio_set_dto()
288 struct radeon_crtc *crtc, unsigned int clock) in dce6_dp_audio_set_dto()
H A Dradeon_audio.h55 struct radeon_crtc *crtc, unsigned int clock);
H A Dcik.c8745 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in dce8_program_fmt() local
8801 WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp); in dce8_program_fmt()
8818 struct radeon_crtc *radeon_crtc, in dce8_line_buffer_adjust() argument
8822 u32 pipe_offset = radeon_crtc->crtc_id * 0x20; in dce8_line_buffer_adjust()
8831 if (radeon_crtc->base.enabled && mode) { in dce8_line_buffer_adjust()
8851 WREG32(LB_MEMORY_CTRL + radeon_crtc->crtc_offset, in dce8_line_buffer_adjust()
8863 if (radeon_crtc->base.enabled && mode) { in dce8_line_buffer_adjust()
9247 struct radeon_crtc *radeon_crtc, in dce8_program_watermarks() argument
9250 struct drm_display_mode *mode = &radeon_crtc->base.mode; in dce8_program_watermarks()
9257 if (radeon_crtc->base.enabled && num_heads && mode) { in dce8_program_watermarks()
[all …]
H A Drs780_dpm.c54 struct radeon_crtc *radeon_crtc; in rs780_get_pm_mode_parameters() local
64 radeon_crtc = to_radeon_crtc(crtc); in rs780_get_pm_mode_parameters()
65 pi->crtc_id = radeon_crtc->crtc_id; in rs780_get_pm_mode_parameters()
H A Dradeon_kms.c263 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_info_ioctl() local
264 *value = radeon_crtc->crtc_id; in radeon_info_ioctl()
H A Ddce3_1_afmt.c117 struct radeon_crtc *crtc, unsigned int clock) in dce3_2_audio_set_dto()

12