1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2014 Advanced Micro Devices, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in 12*4882a593Smuzhiyun * all copies or substantial portions of the Software. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * Authors: Slava Grigorev <slava.grigorev@amd.com> 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #ifndef __RADEON_AUDIO_H__ 26*4882a593Smuzhiyun #define __RADEON_AUDIO_H__ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #include <linux/types.h> 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define RREG32_ENDPOINT(block, reg) \ 31*4882a593Smuzhiyun radeon_audio_endpoint_rreg(rdev, (block), (reg)) 32*4882a593Smuzhiyun #define WREG32_ENDPOINT(block, reg, v) \ 33*4882a593Smuzhiyun radeon_audio_endpoint_wreg(rdev, (block), (reg), (v)) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct radeon_audio_basic_funcs 36*4882a593Smuzhiyun { 37*4882a593Smuzhiyun u32 (*endpoint_rreg)(struct radeon_device *rdev, u32 offset, u32 reg); 38*4882a593Smuzhiyun void (*endpoint_wreg)(struct radeon_device *rdev, 39*4882a593Smuzhiyun u32 offset, u32 reg, u32 v); 40*4882a593Smuzhiyun void (*enable)(struct radeon_device *rdev, 41*4882a593Smuzhiyun struct r600_audio_pin *pin, u8 enable_mask); 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun struct radeon_audio_funcs 45*4882a593Smuzhiyun { 46*4882a593Smuzhiyun void (*select_pin)(struct drm_encoder *encoder); 47*4882a593Smuzhiyun struct r600_audio_pin* (*get_pin)(struct radeon_device *rdev); 48*4882a593Smuzhiyun void (*write_latency_fields)(struct drm_encoder *encoder, 49*4882a593Smuzhiyun struct drm_connector *connector, struct drm_display_mode *mode); 50*4882a593Smuzhiyun void (*write_sad_regs)(struct drm_encoder *encoder, 51*4882a593Smuzhiyun struct cea_sad *sads, int sad_count); 52*4882a593Smuzhiyun void (*write_speaker_allocation)(struct drm_encoder *encoder, 53*4882a593Smuzhiyun u8 *sadb, int sad_count); 54*4882a593Smuzhiyun void (*set_dto)(struct radeon_device *rdev, 55*4882a593Smuzhiyun struct radeon_crtc *crtc, unsigned int clock); 56*4882a593Smuzhiyun void (*update_acr)(struct drm_encoder *encoder, long offset, 57*4882a593Smuzhiyun const struct radeon_hdmi_acr *acr); 58*4882a593Smuzhiyun void (*set_vbi_packet)(struct drm_encoder *encoder, u32 offset); 59*4882a593Smuzhiyun void (*set_color_depth)(struct drm_encoder *encoder, u32 offset, int bpc); 60*4882a593Smuzhiyun void (*set_avi_packet)(struct radeon_device *rdev, u32 offset, 61*4882a593Smuzhiyun unsigned char *buffer, size_t size); 62*4882a593Smuzhiyun void (*set_audio_packet)(struct drm_encoder *encoder, u32 offset); 63*4882a593Smuzhiyun void (*set_mute)(struct drm_encoder *encoder, u32 offset, bool mute); 64*4882a593Smuzhiyun void (*mode_set)(struct drm_encoder *encoder, 65*4882a593Smuzhiyun struct drm_display_mode *mode); 66*4882a593Smuzhiyun void (*dpms)(struct drm_encoder *encoder, bool mode); 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun int radeon_audio_init(struct radeon_device *rdev); 70*4882a593Smuzhiyun void radeon_audio_detect(struct drm_connector *connector, 71*4882a593Smuzhiyun struct drm_encoder *encoder, 72*4882a593Smuzhiyun enum drm_connector_status status); 73*4882a593Smuzhiyun u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, 74*4882a593Smuzhiyun u32 offset, u32 reg); 75*4882a593Smuzhiyun void radeon_audio_endpoint_wreg(struct radeon_device *rdev, 76*4882a593Smuzhiyun u32 offset, u32 reg, u32 v); 77*4882a593Smuzhiyun struct r600_audio_pin *radeon_audio_get_pin(struct drm_encoder *encoder); 78*4882a593Smuzhiyun void radeon_audio_fini(struct radeon_device *rdev); 79*4882a593Smuzhiyun void radeon_audio_mode_set(struct drm_encoder *encoder, 80*4882a593Smuzhiyun struct drm_display_mode *mode); 81*4882a593Smuzhiyun void radeon_audio_dpms(struct drm_encoder *encoder, int mode); 82*4882a593Smuzhiyun unsigned int radeon_audio_decode_dfs_div(unsigned int div); 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #endif 85