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Searched refs:dram_info (Results 1 – 25 of 33) sorted by relevance

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/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_read_leveling.c47 MV_DRAM_INFO *dram_info);
51 MV_DRAM_INFO *dram_info);
62 int ddr3_read_leveling_hw(u32 freq, MV_DRAM_INFO *dram_info) in ddr3_read_leveling_hw() argument
75 reg |= (dram_info->cs_ena << REG_DRAM_TRAINING_CS_OFFS); in ddr3_read_leveling_hw()
94 dram_info->rl_max_phase = 0; in ddr3_read_leveling_hw()
95 dram_info->rl_min_phase = 10; in ddr3_read_leveling_hw()
99 if (dram_info->cs_ena & (1 << cs)) { in ddr3_read_leveling_hw()
101 pup < dram_info->num_of_total_pups; in ddr3_read_leveling_hw()
103 if (pup == dram_info->num_of_std_pups in ddr3_read_leveling_hw()
104 && dram_info->ecc_ena) in ddr3_read_leveling_hw()
[all …]
H A Dddr3_hw_training.c85 MV_DRAM_INFO dram_info; in ddr3_hw_training() local
93 memset(&dram_info, 0, sizeof(dram_info)); in ddr3_hw_training()
94 dram_info.num_cs = ddr3_get_cs_num_from_reg(); in ddr3_hw_training()
95 dram_info.cs_ena = ddr3_get_cs_ena_from_reg(); in ddr3_hw_training()
96 dram_info.target_frequency = target_freq; in ddr3_hw_training()
97 dram_info.ddr_width = ddr_width; in ddr3_hw_training()
98 dram_info.num_of_std_pups = ddr_width / PUP_SIZE; in ddr3_hw_training()
99 dram_info.rl400_bug = 0; in ddr3_hw_training()
100 dram_info.multi_cs_mr_support = 0; in ddr3_hw_training()
102 dram_info.rl400_bug = 1; in ddr3_hw_training()
[all …]
H A Dddr3_write_leveling.c49 MV_DRAM_INFO *dram_info);
65 int ddr3_write_leveling_hw(u32 freq, MV_DRAM_INFO *dram_info) in ddr3_write_leveling_hw() argument
87 reg |= (dram_info->cs_ena << (REG_DRAM_TRAINING_CS_OFFS)); in ddr3_write_leveling_hw()
108 if (dram_info->cs_ena & (1 << cs)) { in ddr3_write_leveling_hw()
110 pup < dram_info->num_of_total_pups; in ddr3_write_leveling_hw()
112 if (pup == dram_info->num_of_std_pups in ddr3_write_leveling_hw()
113 && dram_info->ecc_ena) in ddr3_write_leveling_hw()
122 dram_info->wl_val[cs][pup][P] = phase; in ddr3_write_leveling_hw()
123 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_hw()
124 dram_info->wl_val[cs][pup][S] = in ddr3_write_leveling_hw()
[all …]
H A Dddr3_hw_training.h252 typedef struct dram_info { struct
330 int ddr3_sdram_pbs_compare(MV_DRAM_INFO *dram_info, u32 pup_locked, int is_tx,
335 int ddr3_sdram_dqs_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup,
340 int ddr3_sdram_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup,
345 int ddr3_sdram_direct_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup,
350 int ddr3_sdram_dm_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup,
354 int ddr3_load_patterns(MV_DRAM_INFO *dram_info, int resume);
356 int ddr3_read_leveling_hw(u32 freq, MV_DRAM_INFO *dram_info);
357 int ddr3_read_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info);
359 int ddr3_write_leveling_hw(u32 freq, MV_DRAM_INFO *dram_info);
[all …]
H A Dddr3_dqs.c68 int ddr3_find_adll_limits(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, int is_tx);
71 static int ddr3_center_calc(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,
73 int ddr3_special_pattern_i_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,
75 int ddr3_special_pattern_ii_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,
77 int ddr3_set_dqs_centralization_results(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,
93 static u32 *ddr3_dqs_choose_pattern(MV_DRAM_INFO *dram_info, u32 victim_dq) in ddr3_dqs_choose_pattern() argument
98 switch (dram_info->ddr_width) { in ddr3_dqs_choose_pattern()
131 int ddr3_dqs_centralization_rx(MV_DRAM_INFO *dram_info) in ddr3_dqs_centralization_rx() argument
152 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dqs_centralization_rx()
156 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_dqs_centralization_rx()
[all …]
H A Dddr3_pbs.c60 static int ddr3_tx_shift_dqs_adll_step_before_fail(MV_DRAM_INFO *dram_info,
62 static int ddr3_rx_shift_dqs_to_first_fail(MV_DRAM_INFO *dram_info, u32 cur_pup,
64 static int ddr3_pbs_per_bit(MV_DRAM_INFO *dram_info, int *start_over, int is_tx,
66 static int ddr3_set_pbs_results(MV_DRAM_INFO *dram_info, int is_tx);
76 int ddr3_pbs_tx(MV_DRAM_INFO *dram_info) in ddr3_pbs_tx() argument
105 pups = dram_info->num_of_total_pups; in ddr3_pbs_tx()
106 max_pup = dram_info->num_of_total_pups; in ddr3_pbs_tx()
136 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_pbs_tx()
143 dram_info->num_of_std_pups + ecc; in ddr3_pbs_tx()
162 reg |= (dram_info->ecc_ena * ecc << in ddr3_pbs_tx()
[all …]
H A Dddr3_dfs.c113 int ddr3_dfs_high_2_low(u32 freq, MV_DRAM_INFO *dram_info) in ddr3_dfs_high_2_low() argument
154 if (dram_info->reg_dimm) { in ddr3_dfs_high_2_low()
197 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
394 if (dram_info->reg_dimm) { in ddr3_dfs_high_2_low()
443 if (dram_info->cs_ena & (1 << cs)) in ddr3_dfs_high_2_low()
469 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
677 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
769 int ddr3_dfs_low_2_high(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info) in ddr3_dfs_low_2_high() argument
972 reg |= ((dram_info->mode_2t & REG_DUNIT_CTRL_LOW_2T_MASK) << in ddr3_dfs_low_2_high()
983 if (dram_info->target_frequency == 0x8) in ddr3_dfs_low_2_high()
[all …]
H A Dddr3_sdram.c164 int ddr3_sdram_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup, in ddr3_sdram_compare() argument
175 if (dram_info->num_of_std_pups == PUP_NUM_64BIT) in ddr3_sdram_compare()
220 int ddr3_sdram_dm_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup, in ddr3_sdram_dm_compare() argument
228 if (dram_info->num_of_std_pups == PUP_NUM_64BIT) in ddr3_sdram_dm_compare()
281 int ddr3_sdram_pbs_compare(MV_DRAM_INFO *dram_info, u32 pup_locked, in ddr3_sdram_pbs_compare() argument
299 switch (dram_info->ddr_width) { in ddr3_sdram_pbs_compare()
317 max_pup = dram_info->num_of_std_pups; in ddr3_sdram_pbs_compare()
321 if (dram_info->num_of_std_pups == PUP_NUM_64BIT) in ddr3_sdram_pbs_compare()
349 if (dram_info->ddr_width > 16) { in ddr3_sdram_pbs_compare()
442 int ddr3_sdram_direct_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup, in ddr3_sdram_direct_compare() argument
[all …]
H A Dxor.c24 void mv_sys_xor_init(MV_DRAM_INFO *dram_info) in mv_sys_xor_init() argument
35 for (ui = 0; ui < (dram_info->num_cs + 1); ui++) { in mv_sys_xor_init()
46 reg_write(XOR_BASE_ADDR_REG(0, dram_info->num_cs), base); in mv_sys_xor_init()
48 reg_write(XOR_SIZE_MASK_REG(0, dram_info->num_cs), 0x03FF0000); in mv_sys_xor_init()
52 if (dram_info->cs_ena & (1 << ui)) { in mv_sys_xor_init()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/
H A Dintel_dram.c181 struct dram_info *dram_info = &i915->dram_info; in skl_dram_get_channels_info() local
190 dram_info->num_channels++; in skl_dram_get_channels_info()
196 dram_info->num_channels++; in skl_dram_get_channels_info()
198 if (dram_info->num_channels == 0) { in skl_dram_get_channels_info()
209 dram_info->ranks = 1; in skl_dram_get_channels_info()
211 dram_info->ranks = max(ch0.ranks, ch1.ranks); in skl_dram_get_channels_info()
213 if (dram_info->ranks == 0) { in skl_dram_get_channels_info()
218 dram_info->is_16gb_dimm = ch0.is_16gb_dimm || ch1.is_16gb_dimm; in skl_dram_get_channels_info()
220 dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1); in skl_dram_get_channels_info()
223 yesno(dram_info->symmetric_memory)); in skl_dram_get_channels_info()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_rv1108.h41 struct dram_info { struct
59 int check_rd_gate(struct dram_info *priv); argument
60 void enable_low_power(struct dram_info *priv,
62 void ddr_msch_cfg(struct dram_info *priv,
65 struct dram_info *priv);
66 void ddr_msch_get_max_col(struct dram_info *priv,
68 void ddr_msch_get_max_row(struct dram_info *priv,
70 void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq);
71 void ddr_phy_skew_cfg(struct dram_info *priv);
72 void enable_ddr_io_ret(struct dram_info *priv);
[all …]
H A Dsdram_rk3308.h73 struct dram_info { struct
104 int check_rd_gate(struct dram_info *priv); argument
106 void enable_low_power(struct dram_info *priv,
109 void ddr_msch_cfg(struct dram_info *priv,
112 struct dram_info *priv);
113 void ddr_msch_get_max_col(struct dram_info *priv,
115 void ddr_msch_get_max_row(struct dram_info *priv,
117 void ddr_phy_skew_cfg(struct dram_info *priv);
118 void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq);
119 void enable_ddr_io_ret(struct dram_info *priv);
[all …]
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_rv1108.c19 struct dram_info info;
30 void enable_ddr_io_ret(struct dram_info *priv) in enable_ddr_io_ret()
38 void rkdclk_init(struct dram_info *priv, in rkdclk_init()
66 void phy_pctrl_reset_cru(struct dram_info *priv) in phy_pctrl_reset_cru()
96 void pctl_cfg_grf(struct dram_info *priv, in pctl_cfg_grf()
103 void ddr_msch_cfg(struct dram_info *priv, in ddr_msch_cfg()
118 struct dram_info *priv) in ddr_msch_cfg_rbc()
129 void ddr_phy_skew_cfg(struct dram_info *priv) in ddr_phy_skew_cfg()
133 void set_ds_odt(struct dram_info *priv, in set_ds_odt()
155 void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq) in ddr_phy_dqs_rx_dll_cfg()
[all …]
H A Dsdram_px30.c32 struct dram_info { struct
51 struct dram_info dram_info; argument
65 static void rkclk_ddr_reset(struct dram_info *dram, in rkclk_ddr_reset()
76 static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz) in rkclk_set_dpll()
120 static void rkclk_configure_ddr(struct dram_info *dram, in rkclk_configure_ddr()
169 static void set_ctl_address_map(struct dram_info *dram, in set_ctl_address_map()
228 int read_mr(struct dram_info *dram, u32 rank, u32 mr_num) in read_mr()
239 static u32 check_rd_gate(struct dram_info *dram) in check_rd_gate()
274 static int data_training(struct dram_info *dram, u32 cs, u32 dramtype) in data_training()
297 static void dram_set_bw(struct dram_info *dram, u32 bw) in dram_set_bw()
[all …]
H A Dsdram_rk3328.c24 struct dram_info { struct
67 static void rkclk_ddr_reset(struct dram_info *dram, in rkclk_ddr_reset()
77 static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz) in rkclk_set_dpll()
120 static void rkclk_configure_ddr(struct dram_info *dram, in rkclk_configure_ddr()
219 static void set_ctl_address_map(struct dram_info *dram, in set_ctl_address_map()
236 static int data_training(struct dram_info *dram, u32 cs, u32 dramtype) in data_training()
259 static void rx_deskew_switch_adjust(struct dram_info *dram) in rx_deskew_switch_adjust()
275 static void tx_deskew_switch_adjust(struct dram_info *dram) in tx_deskew_switch_adjust()
282 static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig) in set_ddrconfig()
306 static void dram_all_config(struct dram_info *dram, in dram_all_config()
[all …]
H A Dsdram_rk3128.c16 struct dram_info { struct
23 struct dram_info *priv = dev_get_priv(dev); in rk3128_dmc_probe() argument
36 struct dram_info *priv = dev_get_priv(dev); in rk3128_dmc_get_info()
59 .priv_auto_alloc_size = sizeof(struct dram_info),
H A Dsdram_rv1126.c43 struct dram_info { struct
69 struct dram_info dram_info; argument
303 static void rkclk_ddr_reset(struct dram_info *dram, in rkclk_ddr_reset()
315 static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz) in rkclk_set_dpll()
383 static void rkclk_configure_ddr(struct dram_info *dram, in rkclk_configure_ddr()
495 static void sw_set_req(struct dram_info *dram) in sw_set_req()
503 static void sw_set_ack(struct dram_info *dram) in sw_set_ack()
517 static void set_ctl_address_map(struct dram_info *dram, in set_ctl_address_map()
558 static void phy_pll_set(struct dram_info *dram, u32 freq, u32 wait) in phy_pll_set()
806 static void set_lp4_vref(struct dram_info *dram, struct lp4_info *lp4_info, in set_lp4_vref()
[all …]
H A Dsdram_rk3308.c68 void enable_ddr_io_ret(struct dram_info *priv) in enable_ddr_io_ret()
77 void pll_set(u32 pll_type, struct dram_info *priv, in pll_set()
107 void rkdclk_init(struct dram_info *priv, in rkdclk_init()
423 void phy_pctrl_reset_cru(struct dram_info *priv) in phy_pctrl_reset_cru()
451 void pctl_cfg_grf(struct dram_info *priv, in pctl_cfg_grf()
463 void ddr_msch_cfg(struct dram_info *priv, in ddr_msch_cfg()
473 struct dram_info *priv) in ddr_msch_cfg_rbc()
502 void ddr_phy_skew_cfg(struct dram_info *priv) in ddr_phy_skew_cfg()
513 void set_ds_odt(struct dram_info *priv, in set_ds_odt()
550 void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq) in ddr_phy_dqs_rx_dll_cfg()
[all …]
H A Drockchip_sdram.c22 struct dram_info { struct
29 struct dram_info *priv = dev_get_priv(dev); in dmc_probe() argument
79 struct dram_info *priv = dev_get_priv(dev); in dmc_get_info()
111 .priv_auto_alloc_size = sizeof(struct dram_info),
H A Dsdram_rv1108_pctl_phy.c44 static void phy_pctrl_reset(struct dram_info *priv) in phy_pctrl_reset()
62 static void phy_dll_bypass_set(struct dram_info *priv, unsigned int freq) in phy_dll_bypass_set()
102 static void send_command(struct dram_info *priv, in send_command()
111 static void memory_init(struct dram_info *priv, in memory_init()
196 void move_to_config_state(struct dram_info *priv) in move_to_config_state()
227 void move_to_access_state(struct dram_info *priv) in move_to_access_state()
260 static void pctl_cfg(struct dram_info *priv, in pctl_cfg()
371 static void phy_cfg(struct dram_info *priv, in phy_cfg()
405 static void dram_cfg_rbc(struct dram_info *priv, in dram_cfg_rbc()
413 static void data_training(struct dram_info *priv) in data_training()
[all …]
H A Dsdram_rk322x.c32 struct dram_info { struct
363 static void phy_softreset(struct dram_info *dram) in phy_softreset()
378 static void set_bw(struct dram_info *dram, u32 bw) in set_bw()
577 static void dram_all_config(const struct dram_info *dram, in dram_all_config()
600 static int dram_cap_detect(struct dram_info *dram, in dram_cap_detect()
685 static int sdram_init(struct dram_info *dram, in sdram_init()
784 struct dram_info *priv = dev_get_priv(dev); in rk322x_dmc_probe()
822 struct dram_info *priv = dev_get_priv(dev); in rk322x_dmc_get_info()
847 .priv_auto_alloc_size = sizeof(struct dram_info),
H A Dsdram_rk3288.c38 struct dram_info { struct
592 static void dram_all_config(const struct dram_info *dram, in dram_all_config()
620 static int sdram_rank_bw_detect(struct dram_info *dram, int channel, in sdram_rank_bw_detect()
673 static int sdram_col_row_detect(struct dram_info *dram, int channel, in sdram_col_row_detect()
783 static int sdram_init(struct dram_info *dram, in sdram_init()
929 static int veyron_init(struct dram_info *priv) in veyron_init()
956 struct dram_info *priv = dev_get_priv(dev); in setup_sdram()
1002 struct dram_info *priv = dev_get_priv(dev); in rk3288_dmc_ofdata_to_platdata()
1047 struct dram_info *priv = dev_get_priv(dev); in rk3288_dmc_probe()
1096 struct dram_info *priv = dev_get_priv(dev); in rk3288_dmc_get_info()
[all …]
H A Dsdram_rk3188.c36 struct dram_info { struct
535 static void dram_all_config(const struct dram_info *dram, in dram_all_config()
567 static int sdram_rank_bw_detect(struct dram_info *dram, int channel, in sdram_rank_bw_detect()
628 static int sdram_col_row_detect(struct dram_info *dram, int channel, in sdram_col_row_detect()
712 static int sdram_init(struct dram_info *dram, in sdram_init()
810 struct dram_info *priv = dev_get_priv(dev); in setup_sdram()
886 struct dram_info *priv = dev_get_priv(dev); in rk3188_dmc_probe()
931 struct dram_info *priv = dev_get_priv(dev); in rk3188_dmc_get_info()
956 .priv_auto_alloc_size = sizeof(struct dram_info),
/OK3568_Linux_fs/u-boot/arch/arm/mach-aspeed/ast2500/
H A Dsdram_ast2500.c67 struct dram_info { struct
94 static void ast2500_ddr_phy_init_process(struct dram_info *info) in ast2500_ddr_phy_init_process() argument
108 static void ast2500_sdrammc_set_vref(struct dram_info *info, u32 vref) in ast2500_sdrammc_set_vref()
115 static int ast2500_ddr_cbr_test(struct dram_info *info) in ast2500_ddr_cbr_test()
155 static int ast2500_sdrammc_ddr4_calibrate_vref(struct dram_info *info) in ast2500_sdrammc_ddr4_calibrate_vref()
183 static size_t ast2500_sdrammc_get_vga_mem_size(struct dram_info *info) in ast2500_sdrammc_get_vga_mem_size()
197 static void ast2500_sdrammc_calc_size(struct dram_info *info) in ast2500_sdrammc_calc_size()
241 static int ast2500_sdrammc_init_ddr4(struct dram_info *info) in ast2500_sdrammc_init_ddr4()
315 static void ast2500_sdrammc_unlock(struct dram_info *info) in ast2500_sdrammc_unlock()
322 static void ast2500_sdrammc_lock(struct dram_info *info) in ast2500_sdrammc_lock()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3066/
H A Dsdram_rk3066.c36 struct dram_info { struct
522 static void dram_all_config(const struct dram_info *dram, in dram_all_config()
554 static int sdram_rank_bw_detect(struct dram_info *dram, int channel, in sdram_rank_bw_detect()
615 static int sdram_col_row_detect(struct dram_info *dram, int channel, in sdram_col_row_detect()
692 static int sdram_init(struct dram_info *dram, in sdram_init()
792 struct dram_info *priv = dev_get_priv(dev); in setup_sdram()
866 struct dram_info *priv = dev_get_priv(dev); in rk3066_dmc_probe()
914 struct dram_info *priv = dev_get_priv(dev); in rk3066_dmc_get_info()
939 .priv_auto_alloc_size = sizeof(struct dram_info),

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