43 struct dram_info {  struct
69 struct dram_info dram_info;  argument
303 static void rkclk_ddr_reset(struct dram_info *dram,  in rkclk_ddr_reset()
315 static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz)  in rkclk_set_dpll()
383 static void rkclk_configure_ddr(struct dram_info *dram,  in rkclk_configure_ddr()
495 static void sw_set_req(struct dram_info *dram)  in sw_set_req()
503 static void sw_set_ack(struct dram_info *dram)  in sw_set_ack()
517 static void set_ctl_address_map(struct dram_info *dram,  in set_ctl_address_map()
558 static void phy_pll_set(struct dram_info *dram, u32 freq, u32 wait)  in phy_pll_set()
806 static void set_lp4_vref(struct dram_info *dram, struct lp4_info *lp4_info,  in set_lp4_vref()
877 static void set_ds_odt(struct dram_info *dram,  in set_ds_odt()
1218 static int sdram_cmd_dq_path_remap(struct dram_info *dram,  in sdram_cmd_dq_path_remap()
1241 static void phy_cfg(struct dram_info *dram,  in phy_cfg()
1294 static int update_refresh_reg(struct dram_info *dram)  in update_refresh_reg()
1309 u32 read_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 dramtype)  in read_mr()
1336 void send_a_refresh(struct dram_info *dram)  in send_a_refresh()
1345 static void enter_sr(struct dram_info *dram, u32 en)  in enter_sr()
1368 void record_dq_prebit(struct dram_info *dram)  in record_dq_prebit()
1392 static void update_dq_rx_prebit(struct dram_info *dram)  in update_dq_rx_prebit()
1402 static void update_dq_tx_prebit(struct dram_info *dram)  in update_dq_tx_prebit()
1413 static void update_ca_prebit(struct dram_info *dram)  in update_ca_prebit()
1429 static void modify_ca_deskew(struct dram_info *dram, u32 dir, int delta_dif,  in modify_ca_deskew()
1480 static u32 get_min_value(struct dram_info *dram, u32 signal, u32 rank)  in get_min_value()
1509 static u32 low_power_update(struct dram_info *dram, u32 en)  in low_power_update()
1531 static void modify_dq_deskew(struct dram_info *dram, u32 signal, u32 dir,  in modify_dq_deskew()
1571 static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)  in data_training_rg()
1621 static int data_training_wl(struct dram_info *dram, u32 cs, u32 dramtype,  in data_training_wl()
1691 static int data_training_rd(struct dram_info *dram, u32 cs, u32 dramtype,  in data_training_rd()
1808 static int data_training_wr(struct dram_info *dram, u32 cs, u32 dramtype,  in data_training_wr()
1921 static int data_training(struct dram_info *dram, u32 cs,  in data_training()
1966 static int get_wrlvl_val(struct dram_info *dram,  in get_wrlvl_val()
2002 	result->byte_en = readb(PHY_REG(dram_info.phy, 0xf)) &  in init_rw_trn_result_struct()
2080 static int high_freq_training(struct dram_info *dram,  in high_freq_training()
2195 static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)  in set_ddrconfig()
2201 static void update_noc_timing(struct dram_info *dram,  in update_noc_timing()
2244 static int split_setup(struct dram_info *dram,  in split_setup()
2290 static void split_bypass(struct dram_info *dram)  in split_bypass()
2304 static void dram_all_config(struct dram_info *dram,  in dram_all_config()
2337 static void enable_low_power(struct dram_info *dram,  in enable_low_power()
2368 static void ddr_set_atags(struct dram_info *dram,  in ddr_set_atags()
2496 int sdram_init_(struct dram_info *dram, struct rv1126_sdram_params *sdram_params, u32 post_init)  in sdram_init_()
2633 static u64 dram_detect_cap(struct dram_info *dram,  in dram_detect_cap()
2761 static int dram_detect_cs1_row(struct dram_info *dram,  in dram_detect_cs1_row()
2830 static int sdram_init_detect(struct dram_info *dram,  in sdram_init_detect()
2936 static void pre_set_rate(struct dram_info *dram,  in pre_set_rate()
3062 static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,  in save_fsp_param()
3306 void ddr_set_rate(struct dram_info *dram,  in ddr_set_rate()
3496 static void ddr_set_rate_for_fsp(struct dram_info *dram,  in ddr_set_rate_for_fsp()
3532 	ddr_set_rate(&dram_info, sdram_params, f1,  in ddr_set_rate_for_fsp()
3537 	ddr_set_rate(&dram_info, sdram_params, f2, f1, 2, 0, 1);  in ddr_set_rate_for_fsp()
3541 	ddr_set_rate(&dram_info, sdram_params, f3, f2, 3, 1, 1);  in ddr_set_rate_for_fsp()
3547 	ddr_set_rate(&dram_info, sdram_params, f0, f3, 0, 0, 1);  in ddr_set_rate_for_fsp()
3549 	ddr_set_rate(&dram_info, sdram_params, f0, sdram_params->base.ddr_freq, 1, 1, 1);  in ddr_set_rate_for_fsp()
3574 	dram_info.phy = (void *)DDR_PHY_BASE_ADDR;  in sdram_init()
3575 	dram_info.pctl = (void *)UPCTL2_BASE_ADDR;  in sdram_init()
3576 	dram_info.grf = (void *)GRF_BASE_ADDR;  in sdram_init()
3577 	dram_info.cru = (void *)CRU_BASE_ADDR;  in sdram_init()
3578 	dram_info.msch = (void *)SERVER_MSCH_BASE_ADDR;  in sdram_init()
3579 	dram_info.ddrgrf = (void *)DDR_GRF_BASE_ADDR;  in sdram_init()
3580 	dram_info.pmugrf = (void *)PMU_GRF_BASE_ADDR;  in sdram_init()
3608 	dram_info.sr_idle = SR_INFO(gbl_info->sr_pd_info);  in sdram_init()
3609 	dram_info.pd_idle = PD_INFO(gbl_info->sr_pd_info);  in sdram_init()
3624 	ret = sdram_init_detect(&dram_info, sdram_params);  in sdram_init()
3634 	init_rw_trn_result_struct(&rw_trn_result, dram_info.phy,  in sdram_init()
3638 	ddr_set_rate_for_fsp(&dram_info, sdram_params);  in sdram_init()
3643 	ddr_set_atags(&dram_info, sdram_params);  in sdram_init()