Home
last modified time | relevance | path

Searched refs:CLK_MM_MDP_RSZ1 (Results 1 – 18 of 18) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt6765-mm.c35 GATE_MM(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_ck", 3),
H A Dclk-mt8183-mm.c51 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15),
H A Dclk-mt2701-mm.c58 GATE_DISP0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 12),
H A Dclk-mt6797-mm.c52 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 7),
H A Dclk-mt6779-mm.c50 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15),
H A Dclk-mt8167-mm.c57 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "smi_mm", 5),
H A Dclk-mt8173-mm.c54 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 6),
H A Dclk-mt2712-mm.c68 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 6),
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt8167-clk.h84 #define CLK_MM_MDP_RSZ1 5 macro
H A Dmt6797-clk.h222 #define CLK_MM_MDP_RSZ1 8 macro
H A Dmt6765-clk.h254 #define CLK_MM_MDP_RSZ1 3 macro
H A Dmt8173-clk.h255 #define CLK_MM_MDP_RSZ1 7 macro
H A Dmt8183-clk.h324 #define CLK_MM_MDP_RSZ1 15 macro
H A Dmt2712-clk.h307 #define CLK_MM_MDP_RSZ1 6 macro
H A Dmt6779-clk.h356 #define CLK_MM_MDP_RSZ1 16 macro
H A Dmt2701-clk.h365 #define CLK_MM_MDP_RSZ1 13 macro
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Dmediatek-mdp.txt67 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi969 clocks = <&mmsys CLK_MM_MDP_RSZ1>;