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Searched refs:HAL_DMD_RIU_ReadByte (Results 1 – 25 of 145) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_ATSC.c299 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_WriteReg()
300 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_WriteReg()
306 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_WriteReg()
316 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x1E); in _MBX_WriteReg()
352 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_ReadReg()
353 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_ReadReg()
359 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_ReadReg()
362 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10); in _MBX_ReadReg()
372 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x1E); in _MBX_ReadReg()
375 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x10); in _MBX_ReadReg()
[all …]
H A DhalDMD_INTERN_DTMB.c242 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_WriteReg()
243 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_WriteReg()
247 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_WriteReg()
271 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_ReadReg()
272 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_ReadReg()
276 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_ReadReg()
279 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10); in _MBX_ReadReg()
301 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
343 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
460 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
[all …]
H A DhalDMD_INTERN_common.c202 MS_U8 HAL_DMD_RIU_ReadByte(MS_U32 u32Addr) in HAL_DMD_RIU_ReadByte() function
714 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_RFAGC_Tristate()
735 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_IFAGC_Tristate()
760 …*fTS_CLK=(HAL_DMD_RIU_ReadRegBit(0x103301, BIT_(0)) ? 288.0 : 348.0)/(2*((HAL_DMD_RIU_ReadByte(0x1… in HAL_DMD_TS_GetClockRate()
833 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_ADC_IQ_Switch()
836 ULOGD("DEMOD","before 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
863 ULOGD("DEMOD","after 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
882 u8Temp = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
894 u8data = HAL_DMD_RIU_ReadByte(0x103300); in HAL_DMD_TSO_Clk_Control()
903 u8data = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/
H A DhalDMD_INTERN_DTMB.c205 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_WriteReg()
206 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_WriteReg()
210 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_WriteReg()
234 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_ReadReg()
235 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_ReadReg()
239 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_ReadReg()
242 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10); in _MBX_ReadReg()
264 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
306 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
316 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
[all …]
H A DhalDMD_INTERN_ATSC.c272 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_WriteReg()
273 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_WriteReg()
279 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_WriteReg()
289 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x1E); in _MBX_WriteReg()
325 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_ReadReg()
326 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_ReadReg()
332 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_ReadReg()
335 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10); in _MBX_ReadReg()
344 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x1E); in _MBX_ReadReg()
347 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x10); in _MBX_ReadReg()
[all …]
H A DhalDMD_INTERN_DVBC.c421 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
436 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
445 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
465 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBC_Cmd_Packet_Send()
470 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
476 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
494 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
526 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBC_SoftStop()
537 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBC_SoftStop()
670 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBC_LoadDSPCode()
[all …]
H A DhalDMD_INTERN_common.c202 MS_U8 HAL_DMD_RIU_ReadByte(MS_U32 u32Addr) in HAL_DMD_RIU_ReadByte() function
714 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_RFAGC_Tristate()
735 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_IFAGC_Tristate()
760 …*fTS_CLK=(HAL_DMD_RIU_ReadRegBit(0x103301, BIT_(0)) ? 288.0 : 348.0)/(2*((HAL_DMD_RIU_ReadByte(0x1… in HAL_DMD_TS_GetClockRate()
833 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_ADC_IQ_Switch()
836 ULOGD("DEMOD","before 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
863 ULOGD("DEMOD","after 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
882 u8Temp = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
894 u8data = HAL_DMD_RIU_ReadByte(0x103300); in HAL_DMD_TSO_Clk_Control()
903 u8data = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/
H A DhalDMD_INTERN_DTMB.c202 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_WriteReg()
203 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_WriteReg()
207 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_WriteReg()
231 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_ReadReg()
232 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_ReadReg()
236 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_ReadReg()
239 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10); in _MBX_ReadReg()
261 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
303 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
313 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
[all …]
H A DhalDMD_INTERN_ATSC.c272 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_WriteReg()
273 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_WriteReg()
279 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_WriteReg()
289 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x1E); in _MBX_WriteReg()
325 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_ReadReg()
326 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_ReadReg()
332 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_ReadReg()
335 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10); in _MBX_ReadReg()
344 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x1E); in _MBX_ReadReg()
347 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x10); in _MBX_ReadReg()
[all …]
H A DhalDMD_INTERN_DVBC.c410 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
425 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
434 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
454 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBC_Cmd_Packet_Send()
459 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
465 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
483 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
515 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBC_SoftStop()
526 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBC_SoftStop()
660 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBC_LoadDSPCode()
[all …]
H A DhalDMD_INTERN_common.c202 MS_U8 HAL_DMD_RIU_ReadByte(MS_U32 u32Addr) in HAL_DMD_RIU_ReadByte() function
714 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_RFAGC_Tristate()
735 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_IFAGC_Tristate()
760 …*fTS_CLK=(HAL_DMD_RIU_ReadRegBit(0x103301, BIT_(0)) ? 288.0 : 348.0)/(2*((HAL_DMD_RIU_ReadByte(0x1… in HAL_DMD_TS_GetClockRate()
833 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_ADC_IQ_Switch()
836 ULOGD("Utopia","before 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
863 ULOGD("Utopia","after 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
882 u8Temp = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
894 u8data = HAL_DMD_RIU_ReadByte(0x103300); in HAL_DMD_TSO_Clk_Control()
903 u8data = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/
H A DhalDMD_INTERN_ATSC.c272 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_WriteReg()
273 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_WriteReg()
279 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_WriteReg()
289 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x1E); in _MBX_WriteReg()
325 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_ReadReg()
326 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_ReadReg()
332 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_ReadReg()
335 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10); in _MBX_ReadReg()
344 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x1E); in _MBX_ReadReg()
347 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase_DMD1 + 0x10); in _MBX_ReadReg()
[all …]
H A DhalDMD_INTERN_DTMB.c245 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_WriteReg()
246 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_WriteReg()
250 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_WriteReg()
274 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // asse… in _MBX_ReadReg()
275 …HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-a… in _MBX_ReadReg()
279 u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E); in _MBX_ReadReg()
282 *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10); in _MBX_ReadReg()
304 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
346 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
463 u8Val = HAL_DMD_RIU_ReadByte(0x101e39); in _HAL_INTERN_DTMB_InitClk()
[all …]
H A DhalDMD_INTERN_DVBC.c419 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
434 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
443 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
463 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBC_Cmd_Packet_Send()
468 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
474 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
492 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
524 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBC_SoftStop()
535 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBC_SoftStop()
669 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBC_LoadDSPCode()
[all …]
H A DhalDMD_INTERN_common.c202 MS_U8 HAL_DMD_RIU_ReadByte(MS_U32 u32Addr) in HAL_DMD_RIU_ReadByte() function
714 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_RFAGC_Tristate()
735 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_IFAGC_Tristate()
760 …*fTS_CLK=(HAL_DMD_RIU_ReadRegBit(0x103301, BIT_(0)) ? 288.0 : 348.0)/(2*((HAL_DMD_RIU_ReadByte(0x1… in HAL_DMD_TS_GetClockRate()
833 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_ADC_IQ_Switch()
836 ULOGD("DEMOD","before 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
863 ULOGD("DEMOD","after 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
882 u8Temp = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
894 u8data = HAL_DMD_RIU_ReadByte(0x103300); in HAL_DMD_TSO_Clk_Control()
903 u8data = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBC.c549 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
564 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
573 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
593 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBC_Cmd_Packet_Send()
598 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
604 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
622 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
654 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBC_SoftStop()
665 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBC_SoftStop()
1146 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBC_LoadDSPCode()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/
H A DhalDMD_INTERN_DVBC.c409 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
424 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
433 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
453 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBC_Cmd_Packet_Send()
458 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
464 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
482 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
514 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBC_SoftStop()
525 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBC_SoftStop()
659 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBC_LoadDSPCode()
[all …]
H A DhalDMD_INTERN_common.c204 MS_U8 HAL_DMD_RIU_ReadByte(MS_U32 u32Addr) in HAL_DMD_RIU_ReadByte() function
775 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_RFAGC_Tristate()
796 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_IFAGC_Tristate()
822 …*fTS_CLK=(HAL_DMD_RIU_ReadRegBit(0x103301, BIT_(0)) ? 288.0 : 348.0)/(2*((HAL_DMD_RIU_ReadByte(0x1… in HAL_DMD_TS_GetClockRate()
895 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_ADC_IQ_Switch()
898 printf("before 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
925 printf("after 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
944 u8Temp = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
956 u8data = HAL_DMD_RIU_ReadByte(0x103300); in HAL_DMD_TSO_Clk_Control()
965 u8data = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBC.c410 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
425 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
434 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
454 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBC_Cmd_Packet_Send()
459 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
465 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
483 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
515 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBC_SoftStop()
526 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBC_SoftStop()
624 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBC_LoadDSPCode()
[all …]
H A DhalDMD_INTERN_DVBT.c441 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
456 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
465 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
485 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBT_Cmd_Packet_Send()
490 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
496 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
514 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
546 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBT_SoftStop()
557 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBT_SoftStop()
654 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBT_LoadDSPCode()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBC.c410 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
425 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
434 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
454 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBC_Cmd_Packet_Send()
459 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
465 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
483 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBC_Cmd_Packet_Send()
515 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBC_SoftStop()
526 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBC_SoftStop()
624 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBC_LoadDSPCode()
[all …]
H A DhalDMD_INTERN_DVBT.c441 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
456 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
465 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
485 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_ADDR); in INTERN_DVBT_Cmd_Packet_Send()
490 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
496 reg_val = HAL_DMD_RIU_ReadByte(REG_DTA_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
514 reg_val = HAL_DMD_RIU_ReadByte(REG_CMD_CTRL); in INTERN_DVBT_Cmd_Packet_Send()
546 if (HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)) in INTERN_DVBT_SoftStop()
557 while(HAL_DMD_RIU_ReadByte(MBRegBase + 0x00)!= 0x5A) // wait MB_CNTL set done in INTERN_DVBT_SoftStop()
654 if(HAL_DMD_RIU_ReadByte(0x101E3E)) in INTERN_DVBT_LoadDSPCode()
[all …]
H A DhalDMD_INTERN_common.c205 MS_U8 HAL_DMD_RIU_ReadByte(MS_U32 u32Addr) in HAL_DMD_RIU_ReadByte() function
776 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_RFAGC_Tristate()
797 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_IFAGC_Tristate()
823 …*fTS_CLK=(HAL_DMD_RIU_ReadRegBit(0x103301, BIT_(0)) ? 288.0 : 348.0)/(2*((HAL_DMD_RIU_ReadByte(0x1… in HAL_DMD_TS_GetClockRate()
896 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_ADC_IQ_Switch()
899 ULOGD("DEMOD","before 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
926 ULOGD("DEMOD","after 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
945 u8Temp = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
957 u8data = HAL_DMD_RIU_ReadByte(0x103300); in HAL_DMD_TSO_Clk_Control()
966 u8data = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_common.c202 MS_U8 HAL_DMD_RIU_ReadByte(MS_U32 u32Addr) in HAL_DMD_RIU_ReadByte() function
714 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_RFAGC_Tristate()
735 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_IFAGC_Tristate()
760 …*fTS_CLK=(HAL_DMD_RIU_ReadRegBit(0x103301, BIT_(0)) ? 288.0 : 348.0)/(2*((HAL_DMD_RIU_ReadByte(0x1… in HAL_DMD_TS_GetClockRate()
833 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_ADC_IQ_Switch()
836 printf("before 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
863 printf("after 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
882 u8Temp = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
894 u8data = HAL_DMD_RIU_ReadByte(0x103300); in HAL_DMD_TSO_Clk_Control()
903 u8data = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_common.c202 MS_U8 HAL_DMD_RIU_ReadByte(MS_U32 u32Addr) in HAL_DMD_RIU_ReadByte() function
714 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_RFAGC_Tristate()
735 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_IFAGC_Tristate()
760 …*fTS_CLK=(HAL_DMD_RIU_ReadRegBit(0x103301, BIT_(0)) ? 288.0 : 348.0)/(2*((HAL_DMD_RIU_ReadByte(0x1… in HAL_DMD_TS_GetClockRate()
833 u8RegMuxBackup = HAL_DMD_RIU_ReadByte(0x101E39); in HAL_DMD_ADC_IQ_Switch()
836 printf("before 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
863 printf("after 0x112803 %x\n",HAL_DMD_RIU_ReadByte(0x112803)); in HAL_DMD_ADC_IQ_Switch()
882 u8Temp = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
894 u8data = HAL_DMD_RIU_ReadByte(0x103300); in HAL_DMD_TSO_Clk_Control()
903 u8data = HAL_DMD_RIU_ReadByte(0x103301); in HAL_DMD_TSO_Clk_Control()
[all …]

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