1*53ee8cc1Swenshuai.xi //<MStar Software>
2*53ee8cc1Swenshuai.xi //******************************************************************************
3*53ee8cc1Swenshuai.xi // MStar Software
4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are
6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7*53ee8cc1Swenshuai.xi // law, including, but not limited to, copyright law and international treaties.
8*53ee8cc1Swenshuai.xi // Any use, modification, reproduction, retransmission, or republication of all
9*53ee8cc1Swenshuai.xi // or part of MStar Software is expressly prohibited, unless prior written
10*53ee8cc1Swenshuai.xi // permission has been granted by MStar.
11*53ee8cc1Swenshuai.xi //
12*53ee8cc1Swenshuai.xi // By accessing, browsing and/or using MStar Software, you acknowledge that you
13*53ee8cc1Swenshuai.xi // have read, understood, and agree, to be bound by below terms ("Terms") and to
14*53ee8cc1Swenshuai.xi // comply with all applicable laws and regulations:
15*53ee8cc1Swenshuai.xi //
16*53ee8cc1Swenshuai.xi // 1. MStar shall retain any and all right, ownership and interest to MStar
17*53ee8cc1Swenshuai.xi // Software and any modification/derivatives thereof.
18*53ee8cc1Swenshuai.xi // No right, ownership, or interest to MStar Software and any
19*53ee8cc1Swenshuai.xi // modification/derivatives thereof is transferred to you under Terms.
20*53ee8cc1Swenshuai.xi //
21*53ee8cc1Swenshuai.xi // 2. You understand that MStar Software might include, incorporate or be
22*53ee8cc1Swenshuai.xi // supplied together with third party`s software and the use of MStar
23*53ee8cc1Swenshuai.xi // Software may require additional licenses from third parties.
24*53ee8cc1Swenshuai.xi // Therefore, you hereby agree it is your sole responsibility to separately
25*53ee8cc1Swenshuai.xi // obtain any and all third party right and license necessary for your use of
26*53ee8cc1Swenshuai.xi // such third party`s software.
27*53ee8cc1Swenshuai.xi //
28*53ee8cc1Swenshuai.xi // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29*53ee8cc1Swenshuai.xi // MStar`s confidential information and you agree to keep MStar`s
30*53ee8cc1Swenshuai.xi // confidential information in strictest confidence and not disclose to any
31*53ee8cc1Swenshuai.xi // third party.
32*53ee8cc1Swenshuai.xi //
33*53ee8cc1Swenshuai.xi // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34*53ee8cc1Swenshuai.xi // kind. Any warranties are hereby expressly disclaimed by MStar, including
35*53ee8cc1Swenshuai.xi // without limitation, any warranties of merchantability, non-infringement of
36*53ee8cc1Swenshuai.xi // intellectual property rights, fitness for a particular purpose, error free
37*53ee8cc1Swenshuai.xi // and in conformity with any international standard. You agree to waive any
38*53ee8cc1Swenshuai.xi // claim against MStar for any loss, damage, cost or expense that you may
39*53ee8cc1Swenshuai.xi // incur related to your use of MStar Software.
40*53ee8cc1Swenshuai.xi // In no event shall MStar be liable for any direct, indirect, incidental or
41*53ee8cc1Swenshuai.xi // consequential damages, including without limitation, lost of profit or
42*53ee8cc1Swenshuai.xi // revenues, lost or damage of data, and unauthorized system use.
43*53ee8cc1Swenshuai.xi // You agree that this Section 4 shall still apply without being affected
44*53ee8cc1Swenshuai.xi // even if MStar Software has been modified by MStar in accordance with your
45*53ee8cc1Swenshuai.xi // request or instruction for your use, except otherwise agreed by both
46*53ee8cc1Swenshuai.xi // parties in writing.
47*53ee8cc1Swenshuai.xi //
48*53ee8cc1Swenshuai.xi // 5. If requested, MStar may from time to time provide technical supports or
49*53ee8cc1Swenshuai.xi // services in relation with MStar Software to you for your use of
50*53ee8cc1Swenshuai.xi // MStar Software in conjunction with your or your customer`s product
51*53ee8cc1Swenshuai.xi // ("Services").
52*53ee8cc1Swenshuai.xi // You understand and agree that, except otherwise agreed by both parties in
53*53ee8cc1Swenshuai.xi // writing, Services are provided on an "AS IS" basis and the warranty
54*53ee8cc1Swenshuai.xi // disclaimer set forth in Section 4 above shall apply.
55*53ee8cc1Swenshuai.xi //
56*53ee8cc1Swenshuai.xi // 6. Nothing contained herein shall be construed as by implication, estoppels
57*53ee8cc1Swenshuai.xi // or otherwise:
58*53ee8cc1Swenshuai.xi // (a) conferring any license or right to use MStar name, trademark, service
59*53ee8cc1Swenshuai.xi // mark, symbol or any other identification;
60*53ee8cc1Swenshuai.xi // (b) obligating MStar or any of its affiliates to furnish any person,
61*53ee8cc1Swenshuai.xi // including without limitation, you and your customers, any assistance
62*53ee8cc1Swenshuai.xi // of any kind whatsoever, or any information; or
63*53ee8cc1Swenshuai.xi // (c) conferring any license or right under any intellectual property right.
64*53ee8cc1Swenshuai.xi //
65*53ee8cc1Swenshuai.xi // 7. These terms shall be governed by and construed in accordance with the laws
66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules.
67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally
68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association,
69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration
70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance
71*53ee8cc1Swenshuai.xi // with the said Rules.
72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall
73*53ee8cc1Swenshuai.xi // be English.
74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties.
75*53ee8cc1Swenshuai.xi //
76*53ee8cc1Swenshuai.xi //******************************************************************************
77*53ee8cc1Swenshuai.xi //<MStar Software>
78*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
79*53ee8cc1Swenshuai.xi //
80*53ee8cc1Swenshuai.xi // Copyright (c) 2006-2009 MStar Semiconductor, Inc.
81*53ee8cc1Swenshuai.xi // All rights reserved.
82*53ee8cc1Swenshuai.xi //
83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained
84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of
85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence
86*53ee8cc1Swenshuai.xi // (!��MStar Confidential Information!�L) by the recipient.
87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure,
88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling,
89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential
90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the
91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom.
92*53ee8cc1Swenshuai.xi //
93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi
95*53ee8cc1Swenshuai.xi
96*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
97*53ee8cc1Swenshuai.xi // Include Files
98*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
99*53ee8cc1Swenshuai.xi
100*53ee8cc1Swenshuai.xi #ifndef MSOS_TYPE_LINUX_KERNEL
101*53ee8cc1Swenshuai.xi #include <stdio.h>
102*53ee8cc1Swenshuai.xi #include <math.h>
103*53ee8cc1Swenshuai.xi #endif
104*53ee8cc1Swenshuai.xi
105*53ee8cc1Swenshuai.xi #include "drvDMD_DTMB.h"
106*53ee8cc1Swenshuai.xi
107*53ee8cc1Swenshuai.xi #include "MsTypes.h"
108*53ee8cc1Swenshuai.xi #if DMD_DTMB_UTOPIA_EN || DMD_DTMB_UTOPIA2_EN
109*53ee8cc1Swenshuai.xi #include "drvDMD_common.h"
110*53ee8cc1Swenshuai.xi #include "halDMD_INTERN_common.h"
111*53ee8cc1Swenshuai.xi #endif
112*53ee8cc1Swenshuai.xi
113*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
114*53ee8cc1Swenshuai.xi // Driver Compiler Options
115*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
116*53ee8cc1Swenshuai.xi
117*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_NIKON 0x00
118*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_NASA 0x01
119*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MADISON 0x02
120*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MONACO 0x03
121*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MUJI 0x04
122*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MONET 0x05
123*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MANHATTAN 0x06
124*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MESSI 0x07
125*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MASERATI 0x08
126*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MACAN 0x09
127*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_MOONEY 0x0A
128*53ee8cc1Swenshuai.xi
129*53ee8cc1Swenshuai.xi #if defined(nikon)
130*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_NIKON
131*53ee8cc1Swenshuai.xi #elif defined(nasa)
132*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_NASA
133*53ee8cc1Swenshuai.xi #elif defined(madison)
134*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MADISON
135*53ee8cc1Swenshuai.xi #elif defined(monaco)
136*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MONACO
137*53ee8cc1Swenshuai.xi #elif defined(muji)
138*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MUJI
139*53ee8cc1Swenshuai.xi #elif defined(monet)
140*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MONET
141*53ee8cc1Swenshuai.xi #elif defined(manhattan)
142*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MANHATTAN
143*53ee8cc1Swenshuai.xi #elif defined(messi)
144*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MESSI
145*53ee8cc1Swenshuai.xi #elif defined(maserati)
146*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MASERATI
147*53ee8cc1Swenshuai.xi #elif defined(macan)
148*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MACAN
149*53ee8cc1Swenshuai.xi #elif defined(mooney)
150*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_MOONEY
151*53ee8cc1Swenshuai.xi #else
152*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_VERSION DMD_DTMB_CHIP_NIKON
153*53ee8cc1Swenshuai.xi #endif
154*53ee8cc1Swenshuai.xi
155*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
156*53ee8cc1Swenshuai.xi // Local Defines
157*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
158*53ee8cc1Swenshuai.xi #if 0
159*53ee8cc1Swenshuai.xi #define _RIU_READ_BYTE(addr) ( READ_BYTE(psDMD_DTMB_ResData->sDMD_DTMB_PriData.virtDMDBaseAddr + (addr) ) )
160*53ee8cc1Swenshuai.xi #define _RIU_WRITE_BYTE(addr, val) ( WRITE_BYTE(psDMD_DTMB_ResData->sDMD_DTMB_PriData.virtDMDBaseAddr + (addr), val) )
161*53ee8cc1Swenshuai.xi #endif
162*53ee8cc1Swenshuai.xi #define HAL_INTERN_DTMB_DBINFO(y) //y
163*53ee8cc1Swenshuai.xi
164*53ee8cc1Swenshuai.xi //#define MBRegBase 0x112600
165*53ee8cc1Swenshuai.xi //#define DMDMcuBase 0x103480
166*53ee8cc1Swenshuai.xi
167*53ee8cc1Swenshuai.xi #define DTMB_REG_BASE 0x2600
168*53ee8cc1Swenshuai.xi
169*53ee8cc1Swenshuai.xi #define DTMB_ACI_COEF_SIZE 112
170*53ee8cc1Swenshuai.xi
171*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_ID_NASA 0x6E
172*53ee8cc1Swenshuai.xi #define DMD_DTMB_CHIP_ID_WALTZ 0x9C
173*53ee8cc1Swenshuai.xi
174*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
175*53ee8cc1Swenshuai.xi // Local Variables
176*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
177*53ee8cc1Swenshuai.xi
178*53ee8cc1Swenshuai.xi const MS_U8 INTERN_DTMB_table[] = {
179*53ee8cc1Swenshuai.xi #include "DMD_INTERN_DTMB.dat"
180*53ee8cc1Swenshuai.xi };
181*53ee8cc1Swenshuai.xi
182*53ee8cc1Swenshuai.xi const MS_U8 INTERN_DTMB_6M_table[] = {
183*53ee8cc1Swenshuai.xi #include "DMD_INTERN_DTMB_6M.dat"
184*53ee8cc1Swenshuai.xi };
185*53ee8cc1Swenshuai.xi
186*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
187*53ee8cc1Swenshuai.xi const MS_U8 INTERN_DTMB_table_Waltz[] = {
188*53ee8cc1Swenshuai.xi #include "DMD_INTERN_DTMB_Waltz.dat"
189*53ee8cc1Swenshuai.xi };
190*53ee8cc1Swenshuai.xi
191*53ee8cc1Swenshuai.xi const MS_U8 INTERN_DTMB_6M_table_Waltz[] = {
192*53ee8cc1Swenshuai.xi #include "DMD_INTERN_DTMB_6M_Waltz.dat"
193*53ee8cc1Swenshuai.xi };
194*53ee8cc1Swenshuai.xi #endif
195*53ee8cc1Swenshuai.xi
196*53ee8cc1Swenshuai.xi static MS_U8 _ACI_COEF_TABLE_FS24M_SR8M[DTMB_ACI_COEF_SIZE] = {
197*53ee8cc1Swenshuai.xi 0x80, 0x06, 0x9f, 0xf4, 0x9f, 0xe8, 0x9f, 0xf0, 0x80, 0x09, 0x80, 0x1f, 0x80, 0x1d, 0x80, 0x03, 0x9f, 0xe3, 0x9f, 0xdc, 0x9f, 0xf7, 0x80, 0x1d, 0x80, 0x2c, 0x80, 0x12, 0x9f, 0xe2,
198*53ee8cc1Swenshuai.xi 0x9f, 0xc9, 0x9f, 0xe2, 0x80, 0x1a, 0x80, 0x42, 0x80, 0x2f, 0x9f, 0xeb, 0x9f, 0xb2, 0x9f, 0xbe, 0x80, 0x0c, 0x80, 0x5b, 0x80, 0x5e, 0x80, 0x05, 0x9f, 0x9a, 0x9f, 0x81, 0x9f, 0xdf,
199*53ee8cc1Swenshuai.xi 0x80, 0x6c, 0x80, 0xa7, 0x80, 0x45, 0x9f, 0x8c, 0x9f, 0x24, 0x9f, 0x84, 0x80, 0x7d, 0x81, 0x38, 0x80, 0xe3, 0x9f, 0x7b, 0x9e, 0x0e, 0x9e, 0x1f, 0x80, 0x87, 0x84, 0xa6, 0x88, 0x8c,
200*53ee8cc1Swenshuai.xi 0x8a, 0x25, 0x80, 0x08, 0x80, 0x0b, 0x80, 0x0b, 0x80, 0x01, 0x9f, 0xee, 0x9f, 0xdf, 0x9f, 0xdb, 0x9f, 0xe8, 0x9f, 0xfd, 0x80, 0x0a};
201*53ee8cc1Swenshuai.xi
202*53ee8cc1Swenshuai.xi static MS_U8 _ACI_COEF_TABLE_FS24M_SR6M[DTMB_ACI_COEF_SIZE] = {
203*53ee8cc1Swenshuai.xi 0x9F, 0xF1, 0x9F, 0xFB, 0x80, 0x09, 0x80, 0x15, 0x80, 0x17, 0x80, 0x0D, 0x9F, 0xFB, 0x9F, 0xE9, 0x9F, 0xE2, 0x9F, 0xEC, 0x80, 0x04, 0x80, 0x1D, 0x80, 0x27, 0x80, 0x19, 0x9F, 0xFA,
204*53ee8cc1Swenshuai.xi 0x9F, 0xD9, 0x9F, 0xCE, 0x9F, 0xE1, 0x80, 0x0C, 0x80, 0x35, 0x80, 0x42, 0x80, 0x24, 0x9F, 0xEA, 0x9F, 0xB6, 0x9F, 0xAA, 0x9F, 0xD6, 0x80, 0x26, 0x80, 0x6A, 0x80, 0x72, 0x80, 0x2E,
205*53ee8cc1Swenshuai.xi 0x9F, 0xBF, 0x9F, 0x66, 0x9F, 0x65, 0x9F, 0xCE, 0x80, 0x71, 0x80, 0xED, 0x80, 0xE2, 0x80, 0x35, 0x9F, 0x2B, 0x9E, 0x5C, 0x9E, 0x72, 0x9F, 0xCA, 0x82, 0x3B, 0x85, 0x13, 0x87, 0x59,
206*53ee8cc1Swenshuai.xi 0x88, 0x38, 0x80, 0x00, 0x80, 0x00, 0x80, 0x01, 0x80, 0x02, 0x80, 0x02, 0x80, 0x00, 0x9F, 0xFC, 0x9F, 0xF6, 0x9F, 0xF0, 0x9F, 0xED};
207*53ee8cc1Swenshuai.xi
208*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
209*53ee8cc1Swenshuai.xi // Global Variables
210*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
211*53ee8cc1Swenshuai.xi
212*53ee8cc1Swenshuai.xi extern MS_U8 u8DMD_DTMB_DMD_ID;
213*53ee8cc1Swenshuai.xi
214*53ee8cc1Swenshuai.xi extern DMD_DTMB_ResData *psDMD_DTMB_ResData;
215*53ee8cc1Swenshuai.xi
216*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
217*53ee8cc1Swenshuai.xi // Local Functions
218*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
219*53ee8cc1Swenshuai.xi #if 0
220*53ee8cc1Swenshuai.xi static MS_U8 _HAL_DMD_RIU_ReadByte(MS_U32 u32Addr)
221*53ee8cc1Swenshuai.xi {
222*53ee8cc1Swenshuai.xi return _RIU_READ_BYTE(((u32Addr) << 1) - ((u32Addr) & 1));
223*53ee8cc1Swenshuai.xi }
224*53ee8cc1Swenshuai.xi
225*53ee8cc1Swenshuai.xi static void _HAL_DMD_RIU_WriteByte(MS_U32 u32Addr, MS_U8 u8Value)
226*53ee8cc1Swenshuai.xi {
227*53ee8cc1Swenshuai.xi _RIU_WRITE_BYTE(((u32Addr) << 1) - ((u32Addr) & 1), u8Value);
228*53ee8cc1Swenshuai.xi }
229*53ee8cc1Swenshuai.xi #endif
230*53ee8cc1Swenshuai.xi //static void _HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask)
231*53ee8cc1Swenshuai.xi //{
232*53ee8cc1Swenshuai.xi // _RIU_WRITE_BYTE((((u32Addr) <<1) - ((u32Addr) & 1)), (_RIU_READ_BYTE((((u32Addr) <<1) - ((u32Addr) & 1))) & ~(u8Mask)) | ((u8Value) & (u8Mask)));
233*53ee8cc1Swenshuai.xi //}
234*53ee8cc1Swenshuai.xi
_MBX_WriteReg(MS_U16 u16Addr,MS_U8 u8Data)235*53ee8cc1Swenshuai.xi static MS_BOOL _MBX_WriteReg(MS_U16 u16Addr, MS_U8 u8Data)
236*53ee8cc1Swenshuai.xi {
237*53ee8cc1Swenshuai.xi MS_U8 u8CheckCount;
238*53ee8cc1Swenshuai.xi MS_U8 u8CheckFlag;
239*53ee8cc1Swenshuai.xi
240*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x00, (u16Addr&0xff));
241*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x01, (u16Addr>>8));
242*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x10, u8Data);
243*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x1E, 0x01);
244*53ee8cc1Swenshuai.xi
245*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // assert interrupt to VD MCU51
246*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-assert interrupt to VD MCU51
247*53ee8cc1Swenshuai.xi
248*53ee8cc1Swenshuai.xi for (u8CheckCount=0; u8CheckCount < 10; u8CheckCount++)
249*53ee8cc1Swenshuai.xi {
250*53ee8cc1Swenshuai.xi u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E);
251*53ee8cc1Swenshuai.xi if ((u8CheckFlag&0x01)==0)
252*53ee8cc1Swenshuai.xi break;
253*53ee8cc1Swenshuai.xi MsOS_DelayTask(1);
254*53ee8cc1Swenshuai.xi }
255*53ee8cc1Swenshuai.xi
256*53ee8cc1Swenshuai.xi if (u8CheckFlag&0x01)
257*53ee8cc1Swenshuai.xi {
258*53ee8cc1Swenshuai.xi printf("ERROR: DTMB INTERN DEMOD MBX WRITE TIME OUT!\n");
259*53ee8cc1Swenshuai.xi return FALSE;
260*53ee8cc1Swenshuai.xi }
261*53ee8cc1Swenshuai.xi
262*53ee8cc1Swenshuai.xi return TRUE;
263*53ee8cc1Swenshuai.xi }
264*53ee8cc1Swenshuai.xi
_MBX_ReadReg(MS_U16 u16Addr,MS_U8 * u8Data)265*53ee8cc1Swenshuai.xi static MS_BOOL _MBX_ReadReg(MS_U16 u16Addr, MS_U8 *u8Data)
266*53ee8cc1Swenshuai.xi {
267*53ee8cc1Swenshuai.xi MS_U8 u8CheckCount;
268*53ee8cc1Swenshuai.xi MS_U8 u8CheckFlag;
269*53ee8cc1Swenshuai.xi
270*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x00, (u16Addr&0xff));
271*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x01, (u16Addr>>8));
272*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x1E, 0x02);
273*53ee8cc1Swenshuai.xi
274*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // assert interrupt to VD MCU51
275*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-assert interrupt to VD MCU51
276*53ee8cc1Swenshuai.xi
277*53ee8cc1Swenshuai.xi for (u8CheckCount=0; u8CheckCount < 10; u8CheckCount++)
278*53ee8cc1Swenshuai.xi {
279*53ee8cc1Swenshuai.xi u8CheckFlag = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E);
280*53ee8cc1Swenshuai.xi if ((u8CheckFlag&0x02)==0)
281*53ee8cc1Swenshuai.xi {
282*53ee8cc1Swenshuai.xi *u8Data = HAL_DMD_RIU_ReadByte(MBRegBase + 0x10);
283*53ee8cc1Swenshuai.xi break;
284*53ee8cc1Swenshuai.xi }
285*53ee8cc1Swenshuai.xi MsOS_DelayTask(1);
286*53ee8cc1Swenshuai.xi }
287*53ee8cc1Swenshuai.xi
288*53ee8cc1Swenshuai.xi if (u8CheckFlag&0x02)
289*53ee8cc1Swenshuai.xi {
290*53ee8cc1Swenshuai.xi printf("ERROR: DTMB INTERN DEMOD MBX READ TIME OUT!\n");
291*53ee8cc1Swenshuai.xi return FALSE;
292*53ee8cc1Swenshuai.xi }
293*53ee8cc1Swenshuai.xi
294*53ee8cc1Swenshuai.xi return TRUE;
295*53ee8cc1Swenshuai.xi }
296*53ee8cc1Swenshuai.xi
297*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NIKON)
_HAL_INTERN_DTMB_InitClk(void)298*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
299*53ee8cc1Swenshuai.xi {
300*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
301*53ee8cc1Swenshuai.xi
302*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_NIKON--------------\n");
303*53ee8cc1Swenshuai.xi
304*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
305*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
306*53ee8cc1Swenshuai.xi
307*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
308*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
309*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
310*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x14);
311*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
312*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
313*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
314*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
315*53ee8cc1Swenshuai.xi
316*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
317*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
318*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x00);
319*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x00);
320*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4b, 0x00);
321*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4a, 0x00);
322*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4f, 0x00);
323*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4e, 0x00);
324*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f29, 0x0c);
325*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f28, 0x0c);
326*53ee8cc1Swenshuai.xi //HAL_DMD_RIU_WriteByte(0x111f28, 0x0c);
327*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2d, 0x00);
328*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2c, 0x00);
329*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2f, 0x00);
330*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2e, 0x00);
331*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f35, 0x00);
332*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f34, 0x00);
333*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3b, 0x00);
334*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3a, 0x00);
335*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3d, 0x00);
336*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3c, 0x00);
337*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f43, 0x44);
338*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f42, 0x44);
339*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f45, 0x00);
340*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f44, 0xc4);
341*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f47, 0x00);
342*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f46, 0x00);
343*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0x00);
344*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x04);
345*53ee8cc1Swenshuai.xi
346*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
347*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
348*53ee8cc1Swenshuai.xi }
349*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
_HAL_INTERN_DTMB_InitClk(void)350*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
351*53ee8cc1Swenshuai.xi {
352*53ee8cc1Swenshuai.xi DMD_DTMB_ResData *pRes = psDMD_DTMB_ResData + u8DMD_DTMB_DMD_ID;
353*53ee8cc1Swenshuai.xi
354*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
355*53ee8cc1Swenshuai.xi
356*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
357*53ee8cc1Swenshuai.xi {
358*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_WALTZ--------------\n");
359*53ee8cc1Swenshuai.xi
360*53ee8cc1Swenshuai.xi u8Val = _HAL_DMD_RIU_ReadByte(0x101e39);
361*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
362*53ee8cc1Swenshuai.xi
363*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
364*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
365*53ee8cc1Swenshuai.xi
366*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
367*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x11);
368*53ee8cc1Swenshuai.xi
369*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
370*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
371*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
372*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
373*53ee8cc1Swenshuai.xi
374*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
375*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
376*53ee8cc1Swenshuai.xi
377*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0xcc);
378*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x11);
379*53ee8cc1Swenshuai.xi
380*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x04);
381*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x14);
382*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f73, 0x00);
383*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f72, 0x00);
384*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f75, 0x00);
385*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f74, 0x00);
386*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f77, 0x0c);
387*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f76, 0x0c);
388*53ee8cc1Swenshuai.xi
389*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f61, 0x00);
390*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f60, 0x00);
391*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f63, 0x00);
392*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f62, 0x00);
393*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f65, 0x00);
394*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f64, 0x00);
395*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f69, 0x00);
396*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f68, 0x00);
397*53ee8cc1Swenshuai.xi
398*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6B, 0x44);
399*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6A, 0x44);
400*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7a, 0x00);
401*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7b, 0x00);
402*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6D, 0x00);
403*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6C, 0xC4);
404*53ee8cc1Swenshuai.xi
405*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f71, 0x00);
406*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f70, 0x04);
407*53ee8cc1Swenshuai.xi
408*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f79, 0x00);
409*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f78, 0x00);
410*53ee8cc1Swenshuai.xi
411*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f51, 0x04);
412*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f50, 0x00);
413*53ee8cc1Swenshuai.xi
414*53ee8cc1Swenshuai.xi u8Val = _HAL_DMD_RIU_ReadByte(0x101e39);
415*53ee8cc1Swenshuai.xi _HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
416*53ee8cc1Swenshuai.xi }
417*53ee8cc1Swenshuai.xi else
418*53ee8cc1Swenshuai.xi {
419*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_NASA--------------\n");
420*53ee8cc1Swenshuai.xi
421*53ee8cc1Swenshuai.xi u8Val = _HAL_DMD_RIU_ReadByte(0x101e39);
422*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
423*53ee8cc1Swenshuai.xi
424*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
425*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
426*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
427*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x14);
428*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
429*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
430*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
431*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
432*53ee8cc1Swenshuai.xi
433*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
434*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
435*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x00);
436*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x00);
437*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4b, 0x00);
438*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4a, 0x00);
439*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4f, 0x00);
440*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4e, 0x00);
441*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f29, 0x0c);
442*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f28, 0x0c);
443*53ee8cc1Swenshuai.xi //_HAL_DMD_RIU_WriteByte(0x111f28, 0x0c);
444*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2d, 0x00);
445*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2c, 0x00);
446*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2f, 0x00);
447*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2e, 0x00);
448*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f35, 0x00);
449*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f34, 0x00);
450*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3b, 0x00);
451*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3a, 0x00);
452*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3d, 0x00);
453*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3c, 0x00);
454*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f43, 0x44);
455*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f42, 0x44);
456*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f45, 0x00);
457*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f44, 0xc4);
458*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f47, 0x00);
459*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f46, 0x00);
460*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0x00);
461*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x04);
462*53ee8cc1Swenshuai.xi
463*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
464*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
465*53ee8cc1Swenshuai.xi }
466*53ee8cc1Swenshuai.xi }
467*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MADISON)
_HAL_INTERN_DTMB_InitClk(void)468*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
469*53ee8cc1Swenshuai.xi {
470*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
471*53ee8cc1Swenshuai.xi
472*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_MADISON--------------\n");
473*53ee8cc1Swenshuai.xi
474*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
475*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
476*53ee8cc1Swenshuai.xi
477*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
478*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
479*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
480*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x14);
481*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
482*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
483*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
484*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
485*53ee8cc1Swenshuai.xi
486*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
487*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
488*53ee8cc1Swenshuai.xi
489*53ee8cc1Swenshuai.xi //carl
490*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f15, 0x00);
491*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f14, 0x01);
492*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f17, 0x01);
493*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f16, 0x01);
494*53ee8cc1Swenshuai.xi
495*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x00);
496*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x00);
497*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4b, 0x00);
498*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4a, 0x00);
499*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4f, 0x00);
500*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f4e, 0x00);
501*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f29, 0x0c);
502*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f28, 0x0c);
503*53ee8cc1Swenshuai.xi
504*53ee8cc1Swenshuai.xi //carl
505*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x04);
506*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x04);
507*53ee8cc1Swenshuai.xi
508*53ee8cc1Swenshuai.xi //HAL_DMD_RIU_WriteByte(0x111f28, 0x0c);
509*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2d, 0x00);
510*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2c, 0x00);
511*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2f, 0x00);
512*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f2e, 0x00);
513*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f35, 0x00);
514*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f34, 0x00);
515*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3b, 0x00);
516*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3a, 0x00);
517*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3d, 0x00);
518*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3c, 0x00);
519*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f43, 0x44);
520*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f42, 0x44);
521*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f45, 0x00);
522*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f44, 0xc4);
523*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f47, 0x00);
524*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f46, 0x00);
525*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0x00);
526*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x04);
527*53ee8cc1Swenshuai.xi
528*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
529*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
530*53ee8cc1Swenshuai.xi }
531*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONACO)
_HAL_INTERN_DTMB_InitClk(void)532*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
533*53ee8cc1Swenshuai.xi {
534*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
535*53ee8cc1Swenshuai.xi
536*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_MONACO--------------\n");
537*53ee8cc1Swenshuai.xi
538*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
539*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
540*53ee8cc1Swenshuai.xi
541*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
542*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
543*53ee8cc1Swenshuai.xi
544*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
545*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x11);
546*53ee8cc1Swenshuai.xi
547*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
548*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
549*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
550*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
551*53ee8cc1Swenshuai.xi
552*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
553*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
554*53ee8cc1Swenshuai.xi
555*53ee8cc1Swenshuai.xi //carl
556*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x11);
557*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0x00);
558*53ee8cc1Swenshuai.xi
559*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x04);
560*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x14);
561*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f73, 0x00);
562*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f72, 0x00);
563*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f77, 0x0c);
564*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f76, 0x0c);
565*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f61, 0x00);
566*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f60, 0x00);
567*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f63, 0x00);
568*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f62, 0x00);
569*53ee8cc1Swenshuai.xi
570*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f65, 0x00);
571*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f64, 0x00);
572*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f69, 0x00);
573*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f68, 0x00);
574*53ee8cc1Swenshuai.xi
575*53ee8cc1Swenshuai.xi //carl
576*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6B, 0x44);
577*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6A, 0x44);
578*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6D, 0x00);
579*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6C, 0xC4);
580*53ee8cc1Swenshuai.xi
581*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f71, 0x00);
582*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f70, 0x04);
583*53ee8cc1Swenshuai.xi
584*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f78, 0x00);
585*53ee8cc1Swenshuai.xi
586*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
587*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
588*53ee8cc1Swenshuai.xi }
589*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MUJI)
_HAL_INTERN_DTMB_InitClk(void)590*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
591*53ee8cc1Swenshuai.xi {
592*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
593*53ee8cc1Swenshuai.xi
594*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_MUJI--------------\n");
595*53ee8cc1Swenshuai.xi
596*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
597*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
598*53ee8cc1Swenshuai.xi
599*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
600*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
601*53ee8cc1Swenshuai.xi
602*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
603*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x11);
604*53ee8cc1Swenshuai.xi
605*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
606*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
607*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
608*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
609*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x01); //MUJI add
610*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x00); //MUJI add
611*53ee8cc1Swenshuai.xi
612*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
613*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
614*53ee8cc1Swenshuai.xi
615*53ee8cc1Swenshuai.xi //carl
616*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x11);
617*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0x00);
618*53ee8cc1Swenshuai.xi
619*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x04);
620*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x14);
621*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f73, 0x00);
622*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f72, 0x00);
623*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f77, 0x0c);
624*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f76, 0x0c);
625*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f61, 0x00);
626*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f60, 0x00);
627*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f63, 0x00);
628*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f62, 0x00);
629*53ee8cc1Swenshuai.xi
630*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f65, 0x00);
631*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f64, 0x00);
632*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f69, 0x00);
633*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f68, 0x00);
634*53ee8cc1Swenshuai.xi
635*53ee8cc1Swenshuai.xi //carl
636*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6B, 0x44);
637*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6A, 0x44);
638*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6D, 0x00);
639*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6C, 0xC4);
640*53ee8cc1Swenshuai.xi
641*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f71, 0x00);
642*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f70, 0x04);
643*53ee8cc1Swenshuai.xi
644*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f78, 0x00);
645*53ee8cc1Swenshuai.xi
646*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f51, 0x04); //MUJI add
647*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f50, 0x00); //MuJI add
648*53ee8cc1Swenshuai.xi
649*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x112091, 0x2f); //SRAM power saving
650*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x112090, 0x00); //SRAM power saving
651*53ee8cc1Swenshuai.xi
652*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
653*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
654*53ee8cc1Swenshuai.xi }
655*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONET)
_HAL_INTERN_DTMB_InitClk(void)656*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
657*53ee8cc1Swenshuai.xi {
658*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
659*53ee8cc1Swenshuai.xi
660*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_MONET--------------\n");
661*53ee8cc1Swenshuai.xi
662*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
663*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
664*53ee8cc1Swenshuai.xi
665*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
666*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
667*53ee8cc1Swenshuai.xi
668*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
669*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x11);
670*53ee8cc1Swenshuai.xi
671*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
672*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
673*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
674*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
675*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x01);
676*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x00);
677*53ee8cc1Swenshuai.xi
678*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
679*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
680*53ee8cc1Swenshuai.xi
681*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0x00);
682*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x11);
683*53ee8cc1Swenshuai.xi
684*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x04);
685*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x14);
686*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f73, 0x00);
687*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f72, 0x00);
688*53ee8cc1Swenshuai.xi
689*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f75, 0x00); //monet add
690*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f74, 0x00); //monet add
691*53ee8cc1Swenshuai.xi
692*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f77, 0x0c);
693*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f76, 0x0c);
694*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f61, 0x00);
695*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f60, 0x00);
696*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f63, 0x00);
697*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f62, 0x00);
698*53ee8cc1Swenshuai.xi
699*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f65, 0x00);
700*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f64, 0x00);
701*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f69, 0x00);
702*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f68, 0x00);
703*53ee8cc1Swenshuai.xi
704*53ee8cc1Swenshuai.xi //carl
705*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6B, 0x44);
706*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6A, 0x44);
707*53ee8cc1Swenshuai.xi
708*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7B, 0x00); //monet add
709*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7A, 0x00); //monet add
710*53ee8cc1Swenshuai.xi
711*53ee8cc1Swenshuai.xi
712*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6D, 0x00);
713*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6C, 0xC4);
714*53ee8cc1Swenshuai.xi
715*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f71, 0x00);
716*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f70, 0x04);
717*53ee8cc1Swenshuai.xi
718*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f79, 0x00); //moent add
719*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f78, 0x00); //monet add
720*53ee8cc1Swenshuai.xi
721*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f51, 0x04);
722*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f50, 0x00);
723*53ee8cc1Swenshuai.xi
724*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x112091, 0x10); //SRAM power saving
725*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x112090, 0x00); //SRAM power saving
726*53ee8cc1Swenshuai.xi
727*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
728*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
729*53ee8cc1Swenshuai.xi }
730*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MANHATTAN)
_HAL_INTERN_DTMB_InitClk(void)731*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
732*53ee8cc1Swenshuai.xi {
733*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
734*53ee8cc1Swenshuai.xi
735*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_MANHATTAN--------------\n");
736*53ee8cc1Swenshuai.xi
737*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
738*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
739*53ee8cc1Swenshuai.xi
740*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
741*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
742*53ee8cc1Swenshuai.xi
743*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
744*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x11);
745*53ee8cc1Swenshuai.xi
746*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
747*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
748*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
749*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
750*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x01);
751*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x00);
752*53ee8cc1Swenshuai.xi
753*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
754*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
755*53ee8cc1Swenshuai.xi
756*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0x00);//0xcc?
757*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x11);
758*53ee8cc1Swenshuai.xi
759*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x04);
760*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x14);
761*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f73, 0x00);
762*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f72, 0x00);
763*53ee8cc1Swenshuai.xi
764*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x111f75, 0x00); //monet add
765*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x111f74, 0x00); //monet add
766*53ee8cc1Swenshuai.xi
767*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f77, 0x0c);
768*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f76, 0x0c);
769*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f61, 0x00);
770*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f60, 0x00);
771*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f63, 0x00);
772*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f62, 0x00);
773*53ee8cc1Swenshuai.xi
774*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f65, 0x00);
775*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f64, 0x00);
776*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f69, 0x00);
777*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f68, 0x00);
778*53ee8cc1Swenshuai.xi
779*53ee8cc1Swenshuai.xi //carl
780*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6B, 0x44);
781*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6A, 0x44);
782*53ee8cc1Swenshuai.xi
783*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x111f7B, 0x00); //monet add
784*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7A, 0x00); //monet add
785*53ee8cc1Swenshuai.xi
786*53ee8cc1Swenshuai.xi
787*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6D, 0x00);
788*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6C, 0xC4);
789*53ee8cc1Swenshuai.xi
790*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f71, 0x00);
791*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f70, 0x04);
792*53ee8cc1Swenshuai.xi
793*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f79, 0x00); //moent add
794*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f78, 0x00); //monet add
795*53ee8cc1Swenshuai.xi
796*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f51, 0x04);
797*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f50, 0x00);
798*53ee8cc1Swenshuai.xi
799*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f81, 0x88);// manhattan adds
800*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f80, 0x88);// manhattan adds
801*53ee8cc1Swenshuai.xi
802*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f83, 0xc8);// manhattan adds
803*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f82, 0x88);// manhattan adds
804*53ee8cc1Swenshuai.xi
805*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f85, 0x88);// manhattan adds
806*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f84, 0x88);// manhattan adds
807*53ee8cc1Swenshuai.xi
808*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f87, 0x08);// manhattan adds
809*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f86, 0x88);// manhattan adds
810*53ee8cc1Swenshuai.xi
811*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f89, 0x00);// manhattan adds
812*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f88, 0x00);// manhattan adds
813*53ee8cc1Swenshuai.xi
814*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f8b, 0x00);// manhattan adds
815*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f8a, 0x00);// manhattan adds
816*53ee8cc1Swenshuai.xi
817*53ee8cc1Swenshuai.xi
818*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x112091, 0x10); //SRAM power saving
819*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x112090, 0x00); //SRAM power saving
820*53ee8cc1Swenshuai.xi
821*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
822*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
823*53ee8cc1Swenshuai.xi }
824*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MESSI)
_HAL_INTERN_DTMB_InitClk(void)825*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
826*53ee8cc1Swenshuai.xi {
827*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
828*53ee8cc1Swenshuai.xi
829*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_MESSI--------------\n");
830*53ee8cc1Swenshuai.xi
831*53ee8cc1Swenshuai.xi u8Val = _HAL_DMD_RIU_ReadByte(0x101e39);
832*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
833*53ee8cc1Swenshuai.xi
834*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
835*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
836*53ee8cc1Swenshuai.xi
837*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
838*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x11);
839*53ee8cc1Swenshuai.xi
840*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
841*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
842*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
843*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
844*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x01);
845*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x00);
846*53ee8cc1Swenshuai.xi
847*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
848*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
849*53ee8cc1Swenshuai.xi
850*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f49, 0x00);//0xcc?
851*53ee8cc1Swenshuai.xi //_HAL_DMD_RIU_WriteByte(0x111f48, 0x11);
852*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f48, 0x00);//MESSI only?
853*53ee8cc1Swenshuai.xi
854*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f23, 0x04);
855*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f22, 0x14);
856*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f73, 0x00);
857*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f72, 0x00);
858*53ee8cc1Swenshuai.xi
859*53ee8cc1Swenshuai.xi // _HAL_DMD_RIU_WriteByte(0x111f75, 0x00); //monet add
860*53ee8cc1Swenshuai.xi // _HAL_DMD_RIU_WriteByte(0x111f74, 0x00); //monet add
861*53ee8cc1Swenshuai.xi
862*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f77, 0x0c);
863*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f76, 0x0c);
864*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f61, 0x00);
865*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f60, 0x00);
866*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f63, 0x00);
867*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f62, 0x00);
868*53ee8cc1Swenshuai.xi
869*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f65, 0x00);
870*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f64, 0x00);
871*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f69, 0x00);
872*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f68, 0x00);
873*53ee8cc1Swenshuai.xi
874*53ee8cc1Swenshuai.xi //carl
875*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6B, 0x44);
876*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6A, 0x44);
877*53ee8cc1Swenshuai.xi
878*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x111f7B, 0x00); //monet add
879*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7A, 0x00); //monet add
880*53ee8cc1Swenshuai.xi
881*53ee8cc1Swenshuai.xi
882*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6D, 0x00);
883*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f6C, 0xC4);
884*53ee8cc1Swenshuai.xi
885*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f71, 0x00);
886*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f70, 0x04);
887*53ee8cc1Swenshuai.xi
888*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f79, 0x00); //moent add
889*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f78, 0x00); //monet add
890*53ee8cc1Swenshuai.xi
891*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f51, 0x04);
892*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f50, 0x00);
893*53ee8cc1Swenshuai.xi
894*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f81, 0x88);// manhattan adds
895*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f80, 0x88);// manhattan adds
896*53ee8cc1Swenshuai.xi
897*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f83, 0xc8);// manhattan adds
898*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f82, 0x88);// manhattan adds
899*53ee8cc1Swenshuai.xi
900*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f85, 0x88);// manhattan adds
901*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f84, 0x88);// manhattan adds
902*53ee8cc1Swenshuai.xi
903*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f87, 0x08);// manhattan adds
904*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f86, 0x88);// manhattan adds
905*53ee8cc1Swenshuai.xi
906*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f89, 0x00);// manhattan adds
907*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f88, 0x00);// manhattan adds
908*53ee8cc1Swenshuai.xi
909*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f8b, 0x00);// manhattan adds
910*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f8a, 0x00);// manhattan adds
911*53ee8cc1Swenshuai.xi
912*53ee8cc1Swenshuai.xi
913*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x112091, 0x10); //SRAM power saving
914*53ee8cc1Swenshuai.xi // HAL_DMD_RIU_WriteByte(0x112090, 0x00); //SRAM power saving
915*53ee8cc1Swenshuai.xi
916*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
917*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
918*53ee8cc1Swenshuai.xi }
919*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI)
_HAL_INTERN_DTMB_InitClk(void)920*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
921*53ee8cc1Swenshuai.xi {
922*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
923*53ee8cc1Swenshuai.xi
924*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_MASERATI_MACAN--------------\n");
925*53ee8cc1Swenshuai.xi
926*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
927*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
928*53ee8cc1Swenshuai.xi
929*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x1128d0, 0x01);
930*53ee8cc1Swenshuai.xi
931*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
932*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
933*53ee8cc1Swenshuai.xi
934*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
935*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x11);
936*53ee8cc1Swenshuai.xi
937*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
938*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
939*53ee8cc1Swenshuai.xi
940*53ee8cc1Swenshuai.xi //HAL_DMD_RIU_WriteByte(0x103315, 0x00);
941*53ee8cc1Swenshuai.xi //HAL_DMD_RIU_WriteByte(0x103314, 0x00);
942*53ee8cc1Swenshuai.xi
943*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x01);
944*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x00);
945*53ee8cc1Swenshuai.xi
946*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
947*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
948*53ee8cc1Swenshuai.xi
949*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
950*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
951*53ee8cc1Swenshuai.xi
952*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x1128d0, 0x00);
953*53ee8cc1Swenshuai.xi
954*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3b, 0x00);
955*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3a, 0x00);
956*53ee8cc1Swenshuai.xi
957*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f69, 0xCC);
958*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f68, 0x11);
959*53ee8cc1Swenshuai.xi
960*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152923, 0x00);
961*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152922, 0x14);
962*53ee8cc1Swenshuai.xi
963*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f25, 0x04);
964*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f24, 0x00);
965*53ee8cc1Swenshuai.xi
966*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152973, 0x00);
967*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152972, 0x00);
968*53ee8cc1Swenshuai.xi
969*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152975, 0x00);
970*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152974, 0x00);
971*53ee8cc1Swenshuai.xi
972*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152977, 0x0c);
973*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152976, 0x0c);
974*53ee8cc1Swenshuai.xi
975*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152961, 0x00);
976*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152960, 0x00);
977*53ee8cc1Swenshuai.xi
978*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152963, 0x00);
979*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152962, 0x00);
980*53ee8cc1Swenshuai.xi
981*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152965, 0x00);
982*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152964, 0x00);
983*53ee8cc1Swenshuai.xi
984*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152969, 0x00);
985*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152968, 0x00);
986*53ee8cc1Swenshuai.xi
987*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15296B, 0x44);
988*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15296A, 0x44);
989*53ee8cc1Swenshuai.xi
990*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15297a, 0x00);
991*53ee8cc1Swenshuai.xi
992*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15296d, 0x00);
993*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15296c, 0xc4);
994*53ee8cc1Swenshuai.xi
995*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152971, 0x00);
996*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152970, 0x04);
997*53ee8cc1Swenshuai.xi
998*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152979, 0x00);
999*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152978, 0x00);
1000*53ee8cc1Swenshuai.xi
1001*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152951, 0x04);
1002*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152950, 0x00);
1003*53ee8cc1Swenshuai.xi
1004*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152981, 0x88);
1005*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152980, 0x88);
1006*53ee8cc1Swenshuai.xi
1007*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152983, 0xc8);
1008*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152982, 0x88);
1009*53ee8cc1Swenshuai.xi
1010*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152985, 0x88);
1011*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152984, 0x88);
1012*53ee8cc1Swenshuai.xi
1013*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152987, 0x08);
1014*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152986, 0x8c);
1015*53ee8cc1Swenshuai.xi
1016*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f75, 0x81);
1017*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f74, 0x81);
1018*53ee8cc1Swenshuai.xi
1019*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f77, 0x81);
1020*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f76, 0x88);
1021*53ee8cc1Swenshuai.xi
1022*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15298d, 0x44);
1023*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15298c, 0x00);
1024*53ee8cc1Swenshuai.xi
1025*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15298f, 0x88);
1026*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15298e, 0x88);
1027*53ee8cc1Swenshuai.xi
1028*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152991, 0xc8);
1029*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152990, 0x88);
1030*53ee8cc1Swenshuai.xi
1031*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152993, 0x11);
1032*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152992, 0x18);
1033*53ee8cc1Swenshuai.xi
1034*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7b, 0x18);
1035*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7a, 0x11);
1036*53ee8cc1Swenshuai.xi
1037*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f79, 0x11);
1038*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f78, 0x88);
1039*53ee8cc1Swenshuai.xi
1040*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7d, 0x18);
1041*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7c, 0x11);
1042*53ee8cc1Swenshuai.xi
1043*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f89, 0x00);
1044*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f88, 0x00);
1045*53ee8cc1Swenshuai.xi
1046*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f8b, 0x00);
1047*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f8a, 0x00);
1048*53ee8cc1Swenshuai.xi
1049*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f31, 0x18);
1050*53ee8cc1Swenshuai.xi
1051*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
1052*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
1053*53ee8cc1Swenshuai.xi }
1054*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MOONEY)
_HAL_INTERN_DTMB_InitClk(void)1055*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
1056*53ee8cc1Swenshuai.xi {
1057*53ee8cc1Swenshuai.xi MS_U8 u8Val = 0;
1058*53ee8cc1Swenshuai.xi
1059*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_MOONEY--------------\n");
1060*53ee8cc1Swenshuai.xi
1061*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
1062*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val&(~0x03));
1063*53ee8cc1Swenshuai.xi
1064*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331f, 0x00);
1065*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x10331e, 0x10);
1066*53ee8cc1Swenshuai.xi
1067*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103301, 0x07);
1068*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103300, 0x11);
1069*53ee8cc1Swenshuai.xi
1070*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103309, 0x00);
1071*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103308, 0x00);
1072*53ee8cc1Swenshuai.xi
1073*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103315, 0x00);
1074*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103314, 0x00);
1075*53ee8cc1Swenshuai.xi
1076*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x01);
1077*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x103302, 0x00);
1078*53ee8cc1Swenshuai.xi
1079*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0b, 0x00);
1080*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f0a, 0x00);
1081*53ee8cc1Swenshuai.xi
1082*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3b, 0x00);
1083*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f3a, 0x00);
1084*53ee8cc1Swenshuai.xi
1085*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f69, 0xCC);
1086*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f68, 0x11);
1087*53ee8cc1Swenshuai.xi
1088*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152923, 0x00);
1089*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152922, 0x14);
1090*53ee8cc1Swenshuai.xi
1091*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f25, 0x04);
1092*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f24, 0x00);
1093*53ee8cc1Swenshuai.xi
1094*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152973, 0x00);
1095*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152972, 0x00);
1096*53ee8cc1Swenshuai.xi
1097*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152975, 0x00);
1098*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152974, 0x00);
1099*53ee8cc1Swenshuai.xi
1100*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152977, 0x0c);
1101*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152976, 0x0c);
1102*53ee8cc1Swenshuai.xi
1103*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152961, 0x00);
1104*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152960, 0x00);
1105*53ee8cc1Swenshuai.xi
1106*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152963, 0x00);
1107*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152962, 0x00);
1108*53ee8cc1Swenshuai.xi
1109*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152965, 0x00);
1110*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152964, 0x00);
1111*53ee8cc1Swenshuai.xi
1112*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152969, 0x00);
1113*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152968, 0x00);
1114*53ee8cc1Swenshuai.xi
1115*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15296B, 0x44);
1116*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15296A, 0x44);
1117*53ee8cc1Swenshuai.xi
1118*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15296d, 0x00);
1119*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15296c, 0xc4);
1120*53ee8cc1Swenshuai.xi
1121*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152971, 0x00);
1122*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152970, 0x04);
1123*53ee8cc1Swenshuai.xi
1124*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152979, 0x00);
1125*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152978, 0x00);
1126*53ee8cc1Swenshuai.xi
1127*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152951, 0x04);
1128*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152950, 0x00);
1129*53ee8cc1Swenshuai.xi
1130*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152981, 0x88);
1131*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152980, 0x88);
1132*53ee8cc1Swenshuai.xi
1133*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152983, 0xc8);
1134*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152982, 0x88);
1135*53ee8cc1Swenshuai.xi
1136*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152985, 0x88);
1137*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152984, 0x88);
1138*53ee8cc1Swenshuai.xi
1139*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152987, 0x08);
1140*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152986, 0x8c);
1141*53ee8cc1Swenshuai.xi
1142*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f75, 0x81);
1143*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f74, 0x81);
1144*53ee8cc1Swenshuai.xi
1145*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f77, 0x81);
1146*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f76, 0x88);
1147*53ee8cc1Swenshuai.xi
1148*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15298d, 0x44);
1149*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15298c, 0x00);
1150*53ee8cc1Swenshuai.xi
1151*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15298f, 0x88);
1152*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x15298e, 0x88);
1153*53ee8cc1Swenshuai.xi
1154*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152991, 0xc8);
1155*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152990, 0x88);
1156*53ee8cc1Swenshuai.xi
1157*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152993, 0x11);
1158*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x152992, 0x18);
1159*53ee8cc1Swenshuai.xi
1160*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7b, 0x18);
1161*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7a, 0x11);
1162*53ee8cc1Swenshuai.xi
1163*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f79, 0x11);
1164*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f78, 0x88);
1165*53ee8cc1Swenshuai.xi
1166*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7d, 0x18);
1167*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f7c, 0x11);
1168*53ee8cc1Swenshuai.xi
1169*53ee8cc1Swenshuai.xi
1170*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111fe3, 0x08);
1171*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111fe2, 0x11);
1172*53ee8cc1Swenshuai.xi
1173*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111ff0, 0x08);
1174*53ee8cc1Swenshuai.xi
1175*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f89, 0x00);
1176*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f88, 0x00);
1177*53ee8cc1Swenshuai.xi
1178*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f8b, 0x00);
1179*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f8a, 0x00);
1180*53ee8cc1Swenshuai.xi
1181*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x111f31, 0x18);
1182*53ee8cc1Swenshuai.xi
1183*53ee8cc1Swenshuai.xi u8Val = HAL_DMD_RIU_ReadByte(0x101e39);
1184*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(0x101e39, u8Val|0x03);
1185*53ee8cc1Swenshuai.xi }
1186*53ee8cc1Swenshuai.xi #else
_HAL_INTERN_DTMB_InitClk(void)1187*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_InitClk(void)
1188*53ee8cc1Swenshuai.xi {
1189*53ee8cc1Swenshuai.xi printf("--------------DMD_DTMB_CHIP_NONE--------------\n");
1190*53ee8cc1Swenshuai.xi }
1191*53ee8cc1Swenshuai.xi #endif
1192*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_Ready(void)1193*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_Ready(void)
1194*53ee8cc1Swenshuai.xi {
1195*53ee8cc1Swenshuai.xi MS_U8 udata = 0x00;
1196*53ee8cc1Swenshuai.xi
1197*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x1E, 0x02);
1198*53ee8cc1Swenshuai.xi
1199*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // assert interrupt to VD MCU51
1200*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-assert interrupt to VD MCU51
1201*53ee8cc1Swenshuai.xi
1202*53ee8cc1Swenshuai.xi MsOS_DelayTask(1);
1203*53ee8cc1Swenshuai.xi
1204*53ee8cc1Swenshuai.xi udata = HAL_DMD_RIU_ReadByte(MBRegBase + 0x1E);
1205*53ee8cc1Swenshuai.xi
1206*53ee8cc1Swenshuai.xi if (udata) return FALSE;
1207*53ee8cc1Swenshuai.xi
1208*53ee8cc1Swenshuai.xi return TRUE;
1209*53ee8cc1Swenshuai.xi }
1210*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_Download(void)1211*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_Download(void)
1212*53ee8cc1Swenshuai.xi {
1213*53ee8cc1Swenshuai.xi DMD_DTMB_ResData *pRes = psDMD_DTMB_ResData + u8DMD_DTMB_DMD_ID;
1214*53ee8cc1Swenshuai.xi MS_U8 udata = 0x00;
1215*53ee8cc1Swenshuai.xi MS_U16 i = 0;
1216*53ee8cc1Swenshuai.xi MS_U16 fail_cnt = 0;
1217*53ee8cc1Swenshuai.xi MS_U8 u8TmpData;
1218*53ee8cc1Swenshuai.xi MS_U16 u16AddressOffset;
1219*53ee8cc1Swenshuai.xi const MS_U8 *DTMB_table;
1220*53ee8cc1Swenshuai.xi MS_U16 u16Lib_size;
1221*53ee8cc1Swenshuai.xi
1222*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.bDownloaded)
1223*53ee8cc1Swenshuai.xi {
1224*53ee8cc1Swenshuai.xi if (_HAL_INTERN_DTMB_Ready())
1225*53ee8cc1Swenshuai.xi {
1226*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x01); // reset VD_MCU
1227*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x00);
1228*53ee8cc1Swenshuai.xi MsOS_DelayTask(20);
1229*53ee8cc1Swenshuai.xi return TRUE;
1230*53ee8cc1Swenshuai.xi }
1231*53ee8cc1Swenshuai.xi }
1232*53ee8cc1Swenshuai.xi
1233*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1234*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
1235*53ee8cc1Swenshuai.xi {
1236*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_6M)
1237*53ee8cc1Swenshuai.xi {
1238*53ee8cc1Swenshuai.xi DTMB_table = &INTERN_DTMB_6M_table_Waltz[0];
1239*53ee8cc1Swenshuai.xi u16Lib_size = sizeof(INTERN_DTMB_6M_table_Waltz);
1240*53ee8cc1Swenshuai.xi }
1241*53ee8cc1Swenshuai.xi else
1242*53ee8cc1Swenshuai.xi {
1243*53ee8cc1Swenshuai.xi DTMB_table = &INTERN_DTMB_table_Waltz[0];
1244*53ee8cc1Swenshuai.xi u16Lib_size = sizeof(INTERN_DTMB_table_Waltz);
1245*53ee8cc1Swenshuai.xi }
1246*53ee8cc1Swenshuai.xi }
1247*53ee8cc1Swenshuai.xi else
1248*53ee8cc1Swenshuai.xi {
1249*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_6M)
1250*53ee8cc1Swenshuai.xi {
1251*53ee8cc1Swenshuai.xi DTMB_table = &INTERN_DTMB_6M_table[0];
1252*53ee8cc1Swenshuai.xi u16Lib_size = sizeof(INTERN_DTMB_6M_table);
1253*53ee8cc1Swenshuai.xi }
1254*53ee8cc1Swenshuai.xi else
1255*53ee8cc1Swenshuai.xi {
1256*53ee8cc1Swenshuai.xi DTMB_table = &INTERN_DTMB_table[0];
1257*53ee8cc1Swenshuai.xi u16Lib_size = sizeof(INTERN_DTMB_table);
1258*53ee8cc1Swenshuai.xi }
1259*53ee8cc1Swenshuai.xi }
1260*53ee8cc1Swenshuai.xi #else
1261*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_6M)
1262*53ee8cc1Swenshuai.xi {
1263*53ee8cc1Swenshuai.xi DTMB_table = &INTERN_DTMB_6M_table[0];
1264*53ee8cc1Swenshuai.xi u16Lib_size = sizeof(INTERN_DTMB_6M_table);
1265*53ee8cc1Swenshuai.xi }
1266*53ee8cc1Swenshuai.xi else
1267*53ee8cc1Swenshuai.xi {
1268*53ee8cc1Swenshuai.xi DTMB_table = &INTERN_DTMB_table[0];
1269*53ee8cc1Swenshuai.xi u16Lib_size = sizeof(INTERN_DTMB_table);
1270*53ee8cc1Swenshuai.xi }
1271*53ee8cc1Swenshuai.xi #endif
1272*53ee8cc1Swenshuai.xi
1273*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x01); // reset VD_MCU
1274*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x01, 0x00); // disable SRAM
1275*53ee8cc1Swenshuai.xi
1276*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x00); // release MCU, madison patch
1277*53ee8cc1Swenshuai.xi
1278*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x03, 0x50); // enable "vdmcu51_if"
1279*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x03, 0x51); // enable auto-increase
1280*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x04, 0x00); // sram address low byte
1281*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x05, 0x00); // sram address high byte
1282*53ee8cc1Swenshuai.xi
1283*53ee8cc1Swenshuai.xi //// Load code thru VDMCU_IF ////
1284*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf(">Load Code...\n"));
1285*53ee8cc1Swenshuai.xi
1286*53ee8cc1Swenshuai.xi for (i = 0; i < u16Lib_size; i++)
1287*53ee8cc1Swenshuai.xi {
1288*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, DTMB_table[i]); // write data to VD MCU 51 code sram
1289*53ee8cc1Swenshuai.xi }
1290*53ee8cc1Swenshuai.xi
1291*53ee8cc1Swenshuai.xi //// Content verification ////
1292*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf(">Verify Code...\n"));
1293*53ee8cc1Swenshuai.xi
1294*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x04, 0x00); // sram address low byte
1295*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x05, 0x00); // sram address high byte
1296*53ee8cc1Swenshuai.xi
1297*53ee8cc1Swenshuai.xi for (i = 0; i < u16Lib_size; i++)
1298*53ee8cc1Swenshuai.xi {
1299*53ee8cc1Swenshuai.xi udata = HAL_DMD_RIU_ReadByte(DMDMcuBase+0x10); // read sram data
1300*53ee8cc1Swenshuai.xi
1301*53ee8cc1Swenshuai.xi if (udata != DTMB_table[i])
1302*53ee8cc1Swenshuai.xi {
1303*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf(">fail add = 0x%x\n", i));
1304*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf(">code = 0x%x\n", DTMB_table[i]));
1305*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf(">data = 0x%x\n", udata));
1306*53ee8cc1Swenshuai.xi
1307*53ee8cc1Swenshuai.xi if (fail_cnt++ > 10)
1308*53ee8cc1Swenshuai.xi {
1309*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf(">DSP Loadcode fail!"));
1310*53ee8cc1Swenshuai.xi return FALSE;
1311*53ee8cc1Swenshuai.xi }
1312*53ee8cc1Swenshuai.xi }
1313*53ee8cc1Swenshuai.xi }
1314*53ee8cc1Swenshuai.xi
1315*53ee8cc1Swenshuai.xi u16AddressOffset = (DTMB_table[0x400] << 8)|DTMB_table[0x401];
1316*53ee8cc1Swenshuai.xi
1317*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x04, (u16AddressOffset&0xFF)); // sram address low byte
1318*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x05, (u16AddressOffset>>8)); // sram address high byte
1319*53ee8cc1Swenshuai.xi
1320*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)pRes->sDMD_DTMB_InitData.u16IF_KHZ;
1321*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf("u16IF_KHZ=%d\n",pRes->sDMD_DTMB_InitData.u16IF_KHZ));
1322*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1323*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)(pRes->sDMD_DTMB_InitData.u16IF_KHZ >> 8);
1324*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1325*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)pRes->sDMD_DTMB_InitData.bIQSwap;
1326*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf("bIQSwap=%d\n",pRes->sDMD_DTMB_InitData.bIQSwap));
1327*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1328*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)pRes->sDMD_DTMB_InitData.u16AGC_REFERENCE;
1329*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf("u16AGC_REFERENCE=%X\n",pRes->sDMD_DTMB_InitData.u16AGC_REFERENCE));
1330*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1331*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)(pRes->sDMD_DTMB_InitData.u16AGC_REFERENCE >> 8);
1332*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1333*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)pRes->sDMD_DTMB_InitData.u32TdiStartAddr;
1334*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf("u32TdiStartAddr=%X\n",pRes->sDMD_DTMB_InitData.u32TdiStartAddr));
1335*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1336*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)(pRes->sDMD_DTMB_InitData.u32TdiStartAddr >> 8);
1337*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1338*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)(pRes->sDMD_DTMB_InitData.u32TdiStartAddr >> 16);
1339*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1340*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)(pRes->sDMD_DTMB_InitData.u32TdiStartAddr >> 24);
1341*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1342*53ee8cc1Swenshuai.xi u8TmpData = (MS_U8)pRes->sDMD_DTMB_PriData.eLastType;
1343*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf("eLastType=%d\n",pRes->sDMD_DTMB_PriData.eLastType));
1344*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, u8TmpData); // write data to VD MCU 51 code sram
1345*53ee8cc1Swenshuai.xi
1346*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x03, 0x50); // diable auto-increase
1347*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x03, 0x00); // disable "vdmcu51_if"
1348*53ee8cc1Swenshuai.xi
1349*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x01); // reset MCU, madison patch
1350*53ee8cc1Swenshuai.xi
1351*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x01, 0x01); // enable SRAM
1352*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x00); // release VD_MCU
1353*53ee8cc1Swenshuai.xi
1354*53ee8cc1Swenshuai.xi pRes->sDMD_DTMB_PriData.bDownloaded = true;
1355*53ee8cc1Swenshuai.xi
1356*53ee8cc1Swenshuai.xi MsOS_DelayTask(20);
1357*53ee8cc1Swenshuai.xi
1358*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf(">DSP Loadcode done."));
1359*53ee8cc1Swenshuai.xi
1360*53ee8cc1Swenshuai.xi return TRUE;
1361*53ee8cc1Swenshuai.xi }
1362*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_FWVERSION(void)1363*53ee8cc1Swenshuai.xi static void _HAL_INTERN_DTMB_FWVERSION(void)
1364*53ee8cc1Swenshuai.xi {
1365*53ee8cc1Swenshuai.xi MS_U8 data1,data2,data3;
1366*53ee8cc1Swenshuai.xi
1367*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x20C4, &data1);
1368*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x20C5, &data2);
1369*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x20C6, &data3);
1370*53ee8cc1Swenshuai.xi
1371*53ee8cc1Swenshuai.xi HAL_INTERN_DTMB_DBINFO(printf("INTERN_DTMB_FW_VERSION:%x.%x.%x\n", data1, data2, data3));
1372*53ee8cc1Swenshuai.xi }
1373*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_Exit(void)1374*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_Exit(void)
1375*53ee8cc1Swenshuai.xi {
1376*53ee8cc1Swenshuai.xi MS_U8 u8CheckCount = 0;
1377*53ee8cc1Swenshuai.xi
1378*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(MBRegBase + 0x1C, 0x01);
1379*53ee8cc1Swenshuai.xi
1380*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)|0x02); // assert interrupt to VD MCU51
1381*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase + 0x03, HAL_DMD_RIU_ReadByte(DMDMcuBase + 0x03)&(~0x02)); // de-assert interrupt to VD MCU51
1382*53ee8cc1Swenshuai.xi
1383*53ee8cc1Swenshuai.xi while ((HAL_DMD_RIU_ReadByte(MBRegBase + 0x1C)&0x02) != 0x02)
1384*53ee8cc1Swenshuai.xi {
1385*53ee8cc1Swenshuai.xi MsOS_DelayTaskUs(10);
1386*53ee8cc1Swenshuai.xi
1387*53ee8cc1Swenshuai.xi if (u8CheckCount++ == 0xFF)
1388*53ee8cc1Swenshuai.xi {
1389*53ee8cc1Swenshuai.xi printf(">> DTMB Exit Fail!\n");
1390*53ee8cc1Swenshuai.xi return FALSE;
1391*53ee8cc1Swenshuai.xi }
1392*53ee8cc1Swenshuai.xi }
1393*53ee8cc1Swenshuai.xi
1394*53ee8cc1Swenshuai.xi printf(">> DTMB Exit Ok!\n");
1395*53ee8cc1Swenshuai.xi
1396*53ee8cc1Swenshuai.xi return TRUE;
1397*53ee8cc1Swenshuai.xi }
1398*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_SoftReset(void)1399*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_SoftReset(void)
1400*53ee8cc1Swenshuai.xi {
1401*53ee8cc1Swenshuai.xi MS_U8 u8Data = 0;
1402*53ee8cc1Swenshuai.xi
1403*53ee8cc1Swenshuai.xi //Reset FSM
1404*53ee8cc1Swenshuai.xi if (_MBX_WriteReg(0x20C0, 0x00)==FALSE) return FALSE;
1405*53ee8cc1Swenshuai.xi
1406*53ee8cc1Swenshuai.xi while (u8Data!=0x02)
1407*53ee8cc1Swenshuai.xi {
1408*53ee8cc1Swenshuai.xi if (_MBX_ReadReg(0x20C1, &u8Data)==FALSE) return FALSE;
1409*53ee8cc1Swenshuai.xi }
1410*53ee8cc1Swenshuai.xi
1411*53ee8cc1Swenshuai.xi return TRUE;
1412*53ee8cc1Swenshuai.xi }
1413*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_SetACICoef(void)1414*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_SetACICoef(void)
1415*53ee8cc1Swenshuai.xi {
1416*53ee8cc1Swenshuai.xi DMD_DTMB_ResData *pRes = psDMD_DTMB_ResData + u8DMD_DTMB_DMD_ID;
1417*53ee8cc1Swenshuai.xi
1418*53ee8cc1Swenshuai.xi MS_U8 *ACI_table;
1419*53ee8cc1Swenshuai.xi MS_U8 i;
1420*53ee8cc1Swenshuai.xi MS_U16 u16AddressOffset;
1421*53ee8cc1Swenshuai.xi
1422*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB)
1423*53ee8cc1Swenshuai.xi ACI_table = &_ACI_COEF_TABLE_FS24M_SR8M[0];
1424*53ee8cc1Swenshuai.xi else if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_7M)
1425*53ee8cc1Swenshuai.xi ACI_table = &_ACI_COEF_TABLE_FS24M_SR8M[0];
1426*53ee8cc1Swenshuai.xi else if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_6M)
1427*53ee8cc1Swenshuai.xi ACI_table = &_ACI_COEF_TABLE_FS24M_SR6M[0];
1428*53ee8cc1Swenshuai.xi else if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_5M)
1429*53ee8cc1Swenshuai.xi ACI_table = &_ACI_COEF_TABLE_FS24M_SR8M[0];
1430*53ee8cc1Swenshuai.xi else ACI_table = &_ACI_COEF_TABLE_FS24M_SR8M[0];
1431*53ee8cc1Swenshuai.xi
1432*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x01); // reset VD_MCU
1433*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x01, 0x00); // disable SRAM
1434*53ee8cc1Swenshuai.xi
1435*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x00); // release MCU, madison patch
1436*53ee8cc1Swenshuai.xi
1437*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x03, 0x50); // enable "vdmcu51_if"
1438*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x03, 0x51); // enable auto-increase
1439*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x04, 0x00); // sram address low byte
1440*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x05, 0x00); // sram address high byte
1441*53ee8cc1Swenshuai.xi
1442*53ee8cc1Swenshuai.xi //SET SR value
1443*53ee8cc1Swenshuai.xi u16AddressOffset = ((INTERN_DTMB_table[0x400] << 8)|INTERN_DTMB_table[0x401]) + 10;
1444*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x04, (u16AddressOffset&0xFF)); // sram address low byte
1445*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x05, (u16AddressOffset>>8)); // sram address high byte
1446*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, (MS_U8)pRes->sDMD_DTMB_PriData.eLastType);
1447*53ee8cc1Swenshuai.xi
1448*53ee8cc1Swenshuai.xi //set ACI coefficient
1449*53ee8cc1Swenshuai.xi u16AddressOffset = ((INTERN_DTMB_table[0x40A] << 8)|INTERN_DTMB_table[0x40B]);
1450*53ee8cc1Swenshuai.xi u16AddressOffset = ((INTERN_DTMB_table[u16AddressOffset] << 8)|INTERN_DTMB_table[u16AddressOffset+1]);
1451*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x04, (u16AddressOffset&0xFF)); // sram address low byte
1452*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x05, (u16AddressOffset>>8)); // sram address high byte
1453*53ee8cc1Swenshuai.xi for (i = 0; i < DTMB_ACI_COEF_SIZE; i++)
1454*53ee8cc1Swenshuai.xi {
1455*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x0C, ACI_table[i]); // write data to VD MCU 51 code sram
1456*53ee8cc1Swenshuai.xi }
1457*53ee8cc1Swenshuai.xi
1458*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x03, 0x50); // diable auto-increase
1459*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x03, 0x00); // disable "vdmcu51_if"
1460*53ee8cc1Swenshuai.xi
1461*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x01); // reset MCU, madison patch
1462*53ee8cc1Swenshuai.xi
1463*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x01, 0x01); // enable SRAM
1464*53ee8cc1Swenshuai.xi HAL_DMD_RIU_WriteByte(DMDMcuBase+0x00, 0x00); // release VD_MCU
1465*53ee8cc1Swenshuai.xi
1466*53ee8cc1Swenshuai.xi MsOS_DelayTask(20);
1467*53ee8cc1Swenshuai.xi
1468*53ee8cc1Swenshuai.xi return TRUE;
1469*53ee8cc1Swenshuai.xi }
1470*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_SetDtmbMode(void)1471*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_SetDtmbMode(void)
1472*53ee8cc1Swenshuai.xi {
1473*53ee8cc1Swenshuai.xi if (_MBX_WriteReg(0x20C2, 0x03)==FALSE) return FALSE;
1474*53ee8cc1Swenshuai.xi return _MBX_WriteReg(0x20C0, 0x04);
1475*53ee8cc1Swenshuai.xi }
1476*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_SetModeClean(void)1477*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_SetModeClean(void)
1478*53ee8cc1Swenshuai.xi {
1479*53ee8cc1Swenshuai.xi if (_MBX_WriteReg(0x20C2, 0x07)==FALSE) return FALSE;
1480*53ee8cc1Swenshuai.xi return _MBX_WriteReg(0x20C0, 0x00);
1481*53ee8cc1Swenshuai.xi }
1482*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_Set_QAM_SR(void)1483*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_Set_QAM_SR(void)
1484*53ee8cc1Swenshuai.xi {
1485*53ee8cc1Swenshuai.xi if (_MBX_WriteReg(0x20C2, 0x01)==FALSE) return FALSE;
1486*53ee8cc1Swenshuai.xi return _MBX_WriteReg(0x20C0, 0x04);
1487*53ee8cc1Swenshuai.xi }
1488*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_AGCLock(void)1489*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_AGCLock(void)
1490*53ee8cc1Swenshuai.xi {
1491*53ee8cc1Swenshuai.xi MS_U8 data = 0;
1492*53ee8cc1Swenshuai.xi
1493*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MOONEY)
1494*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2829, &data);//AGC_LOCK
1495*53ee8cc1Swenshuai.xi #else
1496*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x271D, &data);//AGC_LOCK
1497*53ee8cc1Swenshuai.xi #endif
1498*53ee8cc1Swenshuai.xi if (data&0x01)
1499*53ee8cc1Swenshuai.xi {
1500*53ee8cc1Swenshuai.xi return TRUE;
1501*53ee8cc1Swenshuai.xi }
1502*53ee8cc1Swenshuai.xi else
1503*53ee8cc1Swenshuai.xi {
1504*53ee8cc1Swenshuai.xi return FALSE;
1505*53ee8cc1Swenshuai.xi }
1506*53ee8cc1Swenshuai.xi }
1507*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_PNP_Lock(void)1508*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_PNP_Lock(void)
1509*53ee8cc1Swenshuai.xi {
1510*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1511*53ee8cc1Swenshuai.xi DMD_DTMB_ResData *pRes = psDMD_DTMB_ResData + u8DMD_DTMB_DMD_ID;
1512*53ee8cc1Swenshuai.xi #endif
1513*53ee8cc1Swenshuai.xi
1514*53ee8cc1Swenshuai.xi MS_U8 data = 0;
1515*53ee8cc1Swenshuai.xi MS_U8 data1 = 0;
1516*53ee8cc1Swenshuai.xi
1517*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1518*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
1519*53ee8cc1Swenshuai.xi {
1520*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3BBA, &data);
1521*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3C49, &data1);// CFO_FFT_SEC_VALID (_REG_INNDEXT(0x24)+1)
1522*53ee8cc1Swenshuai.xi }
1523*53ee8cc1Swenshuai.xi else
1524*53ee8cc1Swenshuai.xi {
1525*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x22BA, &data);
1526*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2349, &data1);// CFO_FFT_SEC_VALID (_REG_INNDEXT(0x24)+1)
1527*53ee8cc1Swenshuai.xi }
1528*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MADISON)
1529*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x37BA, &data);
1530*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3849, &data1);// CFO_FFT_SEC_VALID (_REG_INNDEXT(0x24)+1)
1531*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONACO || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MUJI || DMD_DTMB_CHIP_VERSION >= DMD_DTMB_CHIP_MONET)
1532*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI)
1533*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x11BA, &data);
1534*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x1249, &data1);// CFO_FFT_SEC_VALID (_REG_INNDEXT(0x24)+1)
1535*53ee8cc1Swenshuai.xi #else
1536*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3BBA, &data);
1537*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3C49, &data1);// CFO_FFT_SEC_VALID (_REG_INNDEXT(0x24)+1)
1538*53ee8cc1Swenshuai.xi #endif
1539*53ee8cc1Swenshuai.xi #else
1540*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x22BA, &data);
1541*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2349, &data1);// CFO_FFT_SEC_VALID (_REG_INNDEXT(0x24)+1)
1542*53ee8cc1Swenshuai.xi #endif
1543*53ee8cc1Swenshuai.xi
1544*53ee8cc1Swenshuai.xi if (((data&0x02) == 0x02)&&((data1&0x20)==0x20))
1545*53ee8cc1Swenshuai.xi {
1546*53ee8cc1Swenshuai.xi return TRUE;
1547*53ee8cc1Swenshuai.xi }
1548*53ee8cc1Swenshuai.xi else
1549*53ee8cc1Swenshuai.xi {
1550*53ee8cc1Swenshuai.xi return FALSE;
1551*53ee8cc1Swenshuai.xi }
1552*53ee8cc1Swenshuai.xi }
1553*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_FEC_Lock(void)1554*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_FEC_Lock(void)
1555*53ee8cc1Swenshuai.xi {
1556*53ee8cc1Swenshuai.xi MS_U8 u8state=0;
1557*53ee8cc1Swenshuai.xi
1558*53ee8cc1Swenshuai.xi
1559*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x20C1, &u8state);
1560*53ee8cc1Swenshuai.xi
1561*53ee8cc1Swenshuai.xi if ((u8state >= 0x62)&& (u8state <= 0xF0))
1562*53ee8cc1Swenshuai.xi {
1563*53ee8cc1Swenshuai.xi return TRUE;
1564*53ee8cc1Swenshuai.xi }
1565*53ee8cc1Swenshuai.xi else
1566*53ee8cc1Swenshuai.xi {
1567*53ee8cc1Swenshuai.xi return FALSE;
1568*53ee8cc1Swenshuai.xi }
1569*53ee8cc1Swenshuai.xi }
1570*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_GetModulation(DMD_DTMB_MODULATION_INFO * psDtmbGetModulation)1571*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_GetModulation(DMD_DTMB_MODULATION_INFO *psDtmbGetModulation)
1572*53ee8cc1Swenshuai.xi {
1573*53ee8cc1Swenshuai.xi DMD_DTMB_ResData *pRes = psDMD_DTMB_ResData + u8DMD_DTMB_DMD_ID;
1574*53ee8cc1Swenshuai.xi
1575*53ee8cc1Swenshuai.xi MS_U8 CM, QAM, IL, CR, SiNR;
1576*53ee8cc1Swenshuai.xi MS_U8 data_L = 0;
1577*53ee8cc1Swenshuai.xi MS_U8 data_H = 0;
1578*53ee8cc1Swenshuai.xi
1579*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB ||
1580*53ee8cc1Swenshuai.xi pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_7M ||
1581*53ee8cc1Swenshuai.xi pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_6M ||
1582*53ee8cc1Swenshuai.xi pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_5M)
1583*53ee8cc1Swenshuai.xi {
1584*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1585*53ee8cc1Swenshuai.xi if(pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
1586*53ee8cc1Swenshuai.xi {
1587*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3B90, &data_L);
1588*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3B91, &data_H);
1589*53ee8cc1Swenshuai.xi }
1590*53ee8cc1Swenshuai.xi else
1591*53ee8cc1Swenshuai.xi {
1592*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2290, &data_L);
1593*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2291, &data_H);
1594*53ee8cc1Swenshuai.xi }
1595*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MADISON)
1596*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3790, &data_L);
1597*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3791, &data_H);
1598*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONACO || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MUJI || DMD_DTMB_CHIP_VERSION >= DMD_DTMB_CHIP_MONET)
1599*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI)
1600*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x1190, &data_L);
1601*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x1191, &data_H);
1602*53ee8cc1Swenshuai.xi #else
1603*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3B90, &data_L);
1604*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3B91, &data_H);
1605*53ee8cc1Swenshuai.xi #endif
1606*53ee8cc1Swenshuai.xi #else
1607*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2290, &data_L);
1608*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2291, &data_H);
1609*53ee8cc1Swenshuai.xi #endif
1610*53ee8cc1Swenshuai.xi
1611*53ee8cc1Swenshuai.xi if (data_L & 0x1)
1612*53ee8cc1Swenshuai.xi {
1613*53ee8cc1Swenshuai.xi CR = (data_L >> 6) & 0x03;
1614*53ee8cc1Swenshuai.xi IL = (data_L >> 3) & 0x01;
1615*53ee8cc1Swenshuai.xi QAM = (data_L >> 4) & 0x03;
1616*53ee8cc1Swenshuai.xi SiNR = (data_L >> 2) & 0x01;
1617*53ee8cc1Swenshuai.xi CM = (data_L >> 1) & 0x01;
1618*53ee8cc1Swenshuai.xi }
1619*53ee8cc1Swenshuai.xi else
1620*53ee8cc1Swenshuai.xi {
1621*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1622*53ee8cc1Swenshuai.xi if(pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
1623*53ee8cc1Swenshuai.xi {
1624*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3B9E, &data_L);
1625*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3B9F, &data_H);
1626*53ee8cc1Swenshuai.xi }
1627*53ee8cc1Swenshuai.xi else
1628*53ee8cc1Swenshuai.xi {
1629*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x229E, &data_L);
1630*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x229F, &data_H);
1631*53ee8cc1Swenshuai.xi }
1632*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MADISON)
1633*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x379E, &data_L);
1634*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x379F, &data_H);
1635*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONACO || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MUJI || DMD_DTMB_CHIP_VERSION >= DMD_DTMB_CHIP_MONET)
1636*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI)
1637*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x119E, &data_L);
1638*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x119F, &data_H);
1639*53ee8cc1Swenshuai.xi #else
1640*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3B9E, &data_L);
1641*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3B9F, &data_H);
1642*53ee8cc1Swenshuai.xi #endif
1643*53ee8cc1Swenshuai.xi #else
1644*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x229E, &data_L);
1645*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x229F, &data_H);
1646*53ee8cc1Swenshuai.xi #endif
1647*53ee8cc1Swenshuai.xi
1648*53ee8cc1Swenshuai.xi CR = (data_H >> 4) & 0x03;
1649*53ee8cc1Swenshuai.xi IL = (data_H >> 6) & 0x01;
1650*53ee8cc1Swenshuai.xi QAM = (data_H >> 2) & 0x03;
1651*53ee8cc1Swenshuai.xi SiNR = (data_H >> 1) & 0x01;
1652*53ee8cc1Swenshuai.xi CM = (data_H) & 0x01;
1653*53ee8cc1Swenshuai.xi }
1654*53ee8cc1Swenshuai.xi
1655*53ee8cc1Swenshuai.xi #if 1//def MSOS_TYPE_LINUX_KERNEL
1656*53ee8cc1Swenshuai.xi if (CR == 0)
1657*53ee8cc1Swenshuai.xi psDtmbGetModulation->fSiCodeRate = 4;
1658*53ee8cc1Swenshuai.xi else if (CR == 1)
1659*53ee8cc1Swenshuai.xi psDtmbGetModulation->fSiCodeRate = 6;
1660*53ee8cc1Swenshuai.xi else if (CR == 2)
1661*53ee8cc1Swenshuai.xi psDtmbGetModulation->fSiCodeRate = 8;
1662*53ee8cc1Swenshuai.xi #else
1663*53ee8cc1Swenshuai.xi if (CR == 0)
1664*53ee8cc1Swenshuai.xi psDtmbGetModulation->fSiCodeRate = 0.4;
1665*53ee8cc1Swenshuai.xi else if (CR == 1)
1666*53ee8cc1Swenshuai.xi psDtmbGetModulation->fSiCodeRate = 0.6;
1667*53ee8cc1Swenshuai.xi else if (CR == 2)
1668*53ee8cc1Swenshuai.xi psDtmbGetModulation->fSiCodeRate = 0.8;
1669*53ee8cc1Swenshuai.xi #endif
1670*53ee8cc1Swenshuai.xi
1671*53ee8cc1Swenshuai.xi if (IL == 0)
1672*53ee8cc1Swenshuai.xi psDtmbGetModulation->u8SiInterLeaver = 240;
1673*53ee8cc1Swenshuai.xi else
1674*53ee8cc1Swenshuai.xi psDtmbGetModulation->u8SiInterLeaver = 720;
1675*53ee8cc1Swenshuai.xi
1676*53ee8cc1Swenshuai.xi if (QAM == 0)
1677*53ee8cc1Swenshuai.xi psDtmbGetModulation->u8SiQamMode = 4;
1678*53ee8cc1Swenshuai.xi else if (QAM == 1)
1679*53ee8cc1Swenshuai.xi psDtmbGetModulation->u8SiQamMode = 16;
1680*53ee8cc1Swenshuai.xi else if (QAM == 2)
1681*53ee8cc1Swenshuai.xi psDtmbGetModulation->u8SiQamMode = 32;
1682*53ee8cc1Swenshuai.xi else if (QAM == 3)
1683*53ee8cc1Swenshuai.xi psDtmbGetModulation->u8SiQamMode = 64;
1684*53ee8cc1Swenshuai.xi
1685*53ee8cc1Swenshuai.xi psDtmbGetModulation->u8SiCarrierMode = CM; // 0:Multi, 1:Single
1686*53ee8cc1Swenshuai.xi psDtmbGetModulation->u8SiNR = SiNR;
1687*53ee8cc1Swenshuai.xi }
1688*53ee8cc1Swenshuai.xi else
1689*53ee8cc1Swenshuai.xi {
1690*53ee8cc1Swenshuai.xi }
1691*53ee8cc1Swenshuai.xi
1692*53ee8cc1Swenshuai.xi return TRUE;
1693*53ee8cc1Swenshuai.xi }
1694*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_ReadIFAGC(void)1695*53ee8cc1Swenshuai.xi static MS_U8 _HAL_INTERN_DTMB_ReadIFAGC(void)
1696*53ee8cc1Swenshuai.xi {
1697*53ee8cc1Swenshuai.xi MS_U8 data = 0;
1698*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MOONEY)
1699*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x280F, &data);
1700*53ee8cc1Swenshuai.xi #else
1701*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x28FD, &data);
1702*53ee8cc1Swenshuai.xi #endif
1703*53ee8cc1Swenshuai.xi
1704*53ee8cc1Swenshuai.xi return data;
1705*53ee8cc1Swenshuai.xi }
1706*53ee8cc1Swenshuai.xi
1707*53ee8cc1Swenshuai.xi #ifdef UTPA2
_HAL_INTERN_DTMB_ReadFrequencyOffset(MS_S16 * pFftfirstCfo,MS_S8 * pFftSecondCfo,MS_S16 * pSr)1708*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_ReadFrequencyOffset(MS_S16 *pFftfirstCfo, MS_S8 *pFftSecondCfo, MS_S16 *pSr)
1709*53ee8cc1Swenshuai.xi #else
1710*53ee8cc1Swenshuai.xi static MS_S16 _HAL_INTERN_DTMB_ReadFrequencyOffset(void)
1711*53ee8cc1Swenshuai.xi #endif
1712*53ee8cc1Swenshuai.xi {
1713*53ee8cc1Swenshuai.xi DMD_DTMB_ResData *pRes = psDMD_DTMB_ResData + u8DMD_DTMB_DMD_ID;
1714*53ee8cc1Swenshuai.xi
1715*53ee8cc1Swenshuai.xi MS_U8 u8Data = 0;
1716*53ee8cc1Swenshuai.xi MS_S16 fftfirstCfo = 0;
1717*53ee8cc1Swenshuai.xi MS_S8 fftSecondCfo = 0;
1718*53ee8cc1Swenshuai.xi MS_S16 sr = 0;
1719*53ee8cc1Swenshuai.xi
1720*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1721*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
1722*53ee8cc1Swenshuai.xi {
1723*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3C4D, &u8Data);
1724*53ee8cc1Swenshuai.xi fftfirstCfo = u8Data;
1725*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3C4C, &u8Data);
1726*53ee8cc1Swenshuai.xi fftfirstCfo = (fftfirstCfo<<8)|u8Data;
1727*53ee8cc1Swenshuai.xi
1728*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3C50, &u8Data);
1729*53ee8cc1Swenshuai.xi fftSecondCfo = u8Data;
1730*53ee8cc1Swenshuai.xi }
1731*53ee8cc1Swenshuai.xi else
1732*53ee8cc1Swenshuai.xi {
1733*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x234D, &u8Data);
1734*53ee8cc1Swenshuai.xi fftfirstCfo = u8Data;
1735*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x234C, &u8Data);
1736*53ee8cc1Swenshuai.xi fftfirstCfo = (fftfirstCfo<<8)|u8Data;
1737*53ee8cc1Swenshuai.xi
1738*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2350, &u8Data);
1739*53ee8cc1Swenshuai.xi fftSecondCfo = u8Data;
1740*53ee8cc1Swenshuai.xi }
1741*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MADISON)
1742*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x384D, &u8Data);
1743*53ee8cc1Swenshuai.xi fftfirstCfo = u8Data;
1744*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x384C, &u8Data);
1745*53ee8cc1Swenshuai.xi fftfirstCfo = (fftfirstCfo<<8)|u8Data;
1746*53ee8cc1Swenshuai.xi
1747*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3850, &u8Data);
1748*53ee8cc1Swenshuai.xi fftSecondCfo = u8Data;
1749*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONACO || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MUJI || DMD_DTMB_CHIP_VERSION >= DMD_DTMB_CHIP_MONET)
1750*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI)
1751*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x124D, &u8Data);
1752*53ee8cc1Swenshuai.xi fftfirstCfo = u8Data;
1753*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x124C, &u8Data);
1754*53ee8cc1Swenshuai.xi fftfirstCfo = (fftfirstCfo<<8)|u8Data;
1755*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x1250, &u8Data);
1756*53ee8cc1Swenshuai.xi fftSecondCfo = u8Data;
1757*53ee8cc1Swenshuai.xi #else
1758*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3C4D, &u8Data);
1759*53ee8cc1Swenshuai.xi fftfirstCfo = u8Data;
1760*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3C4C, &u8Data);
1761*53ee8cc1Swenshuai.xi fftfirstCfo = (fftfirstCfo<<8)|u8Data;
1762*53ee8cc1Swenshuai.xi
1763*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3C50, &u8Data);
1764*53ee8cc1Swenshuai.xi fftSecondCfo = u8Data;
1765*53ee8cc1Swenshuai.xi #endif
1766*53ee8cc1Swenshuai.xi #else
1767*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x234D, &u8Data);
1768*53ee8cc1Swenshuai.xi fftfirstCfo = u8Data;
1769*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x234C, &u8Data);
1770*53ee8cc1Swenshuai.xi fftfirstCfo = (fftfirstCfo<<8)|u8Data;
1771*53ee8cc1Swenshuai.xi
1772*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2350, &u8Data);
1773*53ee8cc1Swenshuai.xi fftSecondCfo = u8Data;
1774*53ee8cc1Swenshuai.xi #endif
1775*53ee8cc1Swenshuai.xi
1776*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_6M)
1777*53ee8cc1Swenshuai.xi sr = 5670;
1778*53ee8cc1Swenshuai.xi else sr = 7560;
1779*53ee8cc1Swenshuai.xi
1780*53ee8cc1Swenshuai.xi #ifdef UTPA2
1781*53ee8cc1Swenshuai.xi *pFftfirstCfo = fftfirstCfo;
1782*53ee8cc1Swenshuai.xi *pFftSecondCfo = fftSecondCfo;
1783*53ee8cc1Swenshuai.xi *pSr = sr;
1784*53ee8cc1Swenshuai.xi
1785*53ee8cc1Swenshuai.xi return TRUE;
1786*53ee8cc1Swenshuai.xi #else
1787*53ee8cc1Swenshuai.xi return (MS_S16)((((double)fftfirstCfo/0x10000+(double)fftSecondCfo/0x20000))*(double)sr);
1788*53ee8cc1Swenshuai.xi #endif
1789*53ee8cc1Swenshuai.xi }
1790*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_ReadSNRPercentage(void)1791*53ee8cc1Swenshuai.xi static MS_U8 _HAL_INTERN_DTMB_ReadSNRPercentage(void)
1792*53ee8cc1Swenshuai.xi {
1793*53ee8cc1Swenshuai.xi DMD_DTMB_ResData *pRes = psDMD_DTMB_ResData + u8DMD_DTMB_DMD_ID;
1794*53ee8cc1Swenshuai.xi
1795*53ee8cc1Swenshuai.xi MS_U8 data = 0;
1796*53ee8cc1Swenshuai.xi MS_U8 level = 0;
1797*53ee8cc1Swenshuai.xi MS_U32 snr = 0;
1798*53ee8cc1Swenshuai.xi
1799*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB ||
1800*53ee8cc1Swenshuai.xi pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_7M ||
1801*53ee8cc1Swenshuai.xi pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_6M ||
1802*53ee8cc1Swenshuai.xi pRes->sDMD_DTMB_PriData.eLastType == DMD_DTMB_DEMOD_DTMB_5M)
1803*53ee8cc1Swenshuai.xi {
1804*53ee8cc1Swenshuai.xi if (!_HAL_INTERN_DTMB_FEC_Lock())
1805*53ee8cc1Swenshuai.xi level = 0;
1806*53ee8cc1Swenshuai.xi else
1807*53ee8cc1Swenshuai.xi {
1808*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1809*53ee8cc1Swenshuai.xi if(pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
1810*53ee8cc1Swenshuai.xi {
1811*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3BDA, &data);
1812*53ee8cc1Swenshuai.xi snr = data&0x3F;
1813*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3BD9, &data);
1814*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1815*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3BD8, &data);
1816*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1817*53ee8cc1Swenshuai.xi }
1818*53ee8cc1Swenshuai.xi else
1819*53ee8cc1Swenshuai.xi {
1820*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x22DA, &data);
1821*53ee8cc1Swenshuai.xi snr = data&0x3F;
1822*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x22D9, &data);
1823*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1824*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x22D8, &data);
1825*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1826*53ee8cc1Swenshuai.xi }
1827*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MADISON)
1828*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x37DA, &data);
1829*53ee8cc1Swenshuai.xi snr = data&0x3F;
1830*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x37D9, &data);
1831*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1832*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x37D8, &data);
1833*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1834*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONACO || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MUJI || DMD_DTMB_CHIP_VERSION >= DMD_DTMB_CHIP_MONET)
1835*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI)
1836*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x11DA, &data);
1837*53ee8cc1Swenshuai.xi snr = data&0x3F;
1838*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x11D9, &data);
1839*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1840*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x11D8, &data);
1841*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1842*53ee8cc1Swenshuai.xi #else
1843*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3BDA, &data);
1844*53ee8cc1Swenshuai.xi snr = data&0x3F;
1845*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3BD9, &data);
1846*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1847*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3BD8, &data);
1848*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1849*53ee8cc1Swenshuai.xi #endif
1850*53ee8cc1Swenshuai.xi #else
1851*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x22DA, &data);
1852*53ee8cc1Swenshuai.xi snr = data&0x3F;
1853*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x22D9, &data);
1854*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1855*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x22D8, &data);
1856*53ee8cc1Swenshuai.xi snr = (snr<<8)|data;
1857*53ee8cc1Swenshuai.xi #endif
1858*53ee8cc1Swenshuai.xi
1859*53ee8cc1Swenshuai.xi if (snr <= 4340 ) level = 1; // SNR <= 0.6 dB
1860*53ee8cc1Swenshuai.xi else if (snr <= 4983 ) level = 2; // SNR <= 1.2 dB
1861*53ee8cc1Swenshuai.xi else if (snr <= 5721 ) level = 3; // SNR <= 1.8 dB
1862*53ee8cc1Swenshuai.xi else if (snr <= 6569 ) level = 4; // SNR <= 2.4 dB
1863*53ee8cc1Swenshuai.xi else if (snr <= 7542 ) level = 5; // SNR <= 3.0 dB
1864*53ee8cc1Swenshuai.xi else if (snr <= 8659 ) level = 6; // SNR <= 3.6 dB
1865*53ee8cc1Swenshuai.xi else if (snr <= 9942 ) level = 7; // SNR <= 4.2 dB
1866*53ee8cc1Swenshuai.xi else if (snr <= 11415 ) level = 8; // SNR <= 4.8 dB
1867*53ee8cc1Swenshuai.xi else if (snr <= 13107 ) level = 9; // SNR <= 5.4 dB
1868*53ee8cc1Swenshuai.xi else if (snr <= 15048 ) level = 10; // SNR <= 6.0 dB
1869*53ee8cc1Swenshuai.xi else if (snr <= 17278 ) level = 11; // SNR <= 6.6 dB
1870*53ee8cc1Swenshuai.xi else if (snr <= 19838 ) level = 12; // SNR <= 7.2 dB
1871*53ee8cc1Swenshuai.xi else if (snr <= 22777 ) level = 13; // SNR <= 7.8 dB
1872*53ee8cc1Swenshuai.xi else if (snr <= 26151 ) level = 14; // SNR <= 8.4 dB
1873*53ee8cc1Swenshuai.xi else if (snr <= 30026 ) level = 15; // SNR <= 9.0 dB
1874*53ee8cc1Swenshuai.xi else if (snr <= 34474 ) level = 16; // SNR <= 9.6 dB
1875*53ee8cc1Swenshuai.xi else if (snr <= 39581 ) level = 17; // SNR <= 10.2 dB
1876*53ee8cc1Swenshuai.xi else if (snr <= 45446 ) level = 18; // SNR <= 10.8 dB
1877*53ee8cc1Swenshuai.xi else if (snr <= 52179 ) level = 19; // SNR <= 11.4 dB
1878*53ee8cc1Swenshuai.xi else if (snr <= 59909 ) level = 20; // SNR <= 12.0 dB
1879*53ee8cc1Swenshuai.xi else if (snr <= 68785 ) level = 21; // SNR <= 12.6 dB
1880*53ee8cc1Swenshuai.xi else if (snr <= 78975 ) level = 22; // SNR <= 13.2 dB
1881*53ee8cc1Swenshuai.xi else if (snr <= 90676 ) level = 23; // SNR <= 13.8 dB
1882*53ee8cc1Swenshuai.xi else if (snr <= 104110 ) level = 24; // SNR <= 14.4 dB
1883*53ee8cc1Swenshuai.xi else if (snr <= 119534 ) level = 25; // SNR <= 15.0 dB
1884*53ee8cc1Swenshuai.xi else if (snr <= 137244 ) level = 26; // SNR <= 15.6 dB
1885*53ee8cc1Swenshuai.xi else if (snr <= 157577 ) level = 27; // SNR <= 16.2 dB
1886*53ee8cc1Swenshuai.xi else if (snr <= 180922 ) level = 28; // SNR <= 16.8 dB
1887*53ee8cc1Swenshuai.xi else if (snr <= 207726 ) level = 29; // SNR <= 17.4 dB
1888*53ee8cc1Swenshuai.xi else if (snr <= 238502 ) level = 30; // SNR <= 18.0 dB
1889*53ee8cc1Swenshuai.xi else if (snr <= 273837 ) level = 31; // SNR <= 18.6 dB
1890*53ee8cc1Swenshuai.xi else if (snr <= 314407 ) level = 32; // SNR <= 19.2 dB
1891*53ee8cc1Swenshuai.xi else if (snr <= 360987 ) level = 33; // SNR <= 19.8 dB
1892*53ee8cc1Swenshuai.xi else if (snr <= 414469 ) level = 34; // SNR <= 20.4 dB
1893*53ee8cc1Swenshuai.xi else if (snr <= 475874 ) level = 35; // SNR <= 21.0 dB
1894*53ee8cc1Swenshuai.xi else if (snr <= 546376 ) level = 36; // SNR <= 21.6 dB
1895*53ee8cc1Swenshuai.xi else if (snr <= 627324 ) level = 37; // SNR <= 22.2 dB
1896*53ee8cc1Swenshuai.xi else if (snr <= 720264 ) level = 38; // SNR <= 22.8 dB
1897*53ee8cc1Swenshuai.xi else if (snr <= 826974 ) level = 39; // SNR <= 23.4 dB
1898*53ee8cc1Swenshuai.xi else if (snr <= 949493 ) level = 40; // SNR <= 24.0 dB
1899*53ee8cc1Swenshuai.xi else if (snr <= 1090164) level = 41; // SNR <= 24.6 dB
1900*53ee8cc1Swenshuai.xi else if (snr <= 1251676) level = 42; // SNR <= 25.2 dB
1901*53ee8cc1Swenshuai.xi else if (snr <= 1437116) level = 43; // SNR <= 25.8 dB
1902*53ee8cc1Swenshuai.xi else if (snr <= 1650030) level = 44; // SNR <= 26.4 dB
1903*53ee8cc1Swenshuai.xi else if (snr <= 1894488) level = 45; // SNR <= 27.0 dB
1904*53ee8cc1Swenshuai.xi else if (snr <= 2175163) level = 46; // SNR <= 27.6 dB
1905*53ee8cc1Swenshuai.xi else if (snr <= 2497421) level = 47; // SNR <= 28.2 dB
1906*53ee8cc1Swenshuai.xi else if (snr <= 2867423) level = 48; // SNR <= 28.8 dB
1907*53ee8cc1Swenshuai.xi else if (snr <= 3292242) level = 49; // SNR <= 29.4 dB
1908*53ee8cc1Swenshuai.xi else if (snr > 3292242) level = 50; // SNR <= 30.0 dB
1909*53ee8cc1Swenshuai.xi }
1910*53ee8cc1Swenshuai.xi }
1911*53ee8cc1Swenshuai.xi else
1912*53ee8cc1Swenshuai.xi {
1913*53ee8cc1Swenshuai.xi level = 0;
1914*53ee8cc1Swenshuai.xi }
1915*53ee8cc1Swenshuai.xi
1916*53ee8cc1Swenshuai.xi return level*2;
1917*53ee8cc1Swenshuai.xi }
1918*53ee8cc1Swenshuai.xi
1919*53ee8cc1Swenshuai.xi #ifdef UTPA2
_HAL_INTERN_DTMB_GetPreLdpcBer(MS_U32 * pBitErr,MS_U16 * pError_window)1920*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_GetPreLdpcBer(MS_U32 *pBitErr, MS_U16 *pError_window)
1921*53ee8cc1Swenshuai.xi #else
1922*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_GetPreLdpcBer(float *pber)
1923*53ee8cc1Swenshuai.xi #endif
1924*53ee8cc1Swenshuai.xi {
1925*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1926*53ee8cc1Swenshuai.xi DMD_DTMB_ResData *pRes = psDMD_DTMB_ResData + u8DMD_DTMB_DMD_ID;
1927*53ee8cc1Swenshuai.xi #endif
1928*53ee8cc1Swenshuai.xi
1929*53ee8cc1Swenshuai.xi MS_U8 u8Data=0;
1930*53ee8cc1Swenshuai.xi MS_U32 BitErr;
1931*53ee8cc1Swenshuai.xi MS_U16 error_window;
1932*53ee8cc1Swenshuai.xi
1933*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1934*53ee8cc1Swenshuai.xi if (pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
1935*53ee8cc1Swenshuai.xi {
1936*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F3B, &u8Data);
1937*53ee8cc1Swenshuai.xi BitErr = u8Data;
1938*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F3A, &u8Data);
1939*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1940*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F39, &u8Data);
1941*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1942*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F38, &u8Data);
1943*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1944*53ee8cc1Swenshuai.xi }
1945*53ee8cc1Swenshuai.xi else
1946*53ee8cc1Swenshuai.xi {
1947*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x263B, &u8Data);
1948*53ee8cc1Swenshuai.xi BitErr = u8Data;
1949*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x263A, &u8Data);
1950*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1951*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2639, &u8Data);
1952*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1953*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2638, &u8Data);
1954*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1955*53ee8cc1Swenshuai.xi }
1956*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MADISON)
1957*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2D3B, &u8Data);
1958*53ee8cc1Swenshuai.xi BitErr = u8Data;
1959*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2D3A, &u8Data);
1960*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1961*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2D39, &u8Data);
1962*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1963*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2D38, &u8Data);
1964*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1965*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONACO || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MUJI || DMD_DTMB_CHIP_VERSION >= DMD_DTMB_CHIP_MONET)
1966*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI)
1967*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x163B, &u8Data);
1968*53ee8cc1Swenshuai.xi BitErr = u8Data;
1969*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x163A, &u8Data);
1970*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1971*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x1639, &u8Data);
1972*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1973*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x1638, &u8Data);
1974*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1975*53ee8cc1Swenshuai.xi #else
1976*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F3B, &u8Data);
1977*53ee8cc1Swenshuai.xi BitErr = u8Data;
1978*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F3A, &u8Data);
1979*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1980*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F39, &u8Data);
1981*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1982*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F38, &u8Data);
1983*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1984*53ee8cc1Swenshuai.xi #endif
1985*53ee8cc1Swenshuai.xi #else
1986*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x263B, &u8Data);
1987*53ee8cc1Swenshuai.xi BitErr = u8Data;
1988*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x263A, &u8Data);
1989*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1990*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2639, &u8Data);
1991*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1992*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2638, &u8Data);
1993*53ee8cc1Swenshuai.xi BitErr = (BitErr << 8)|u8Data;
1994*53ee8cc1Swenshuai.xi #endif
1995*53ee8cc1Swenshuai.xi
1996*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_NASA)
1997*53ee8cc1Swenshuai.xi if(pRes->sDMD_DTMB_PriData.u16ChipID == DMD_DTMB_CHIP_ID_WALTZ)
1998*53ee8cc1Swenshuai.xi {
1999*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F2F, &u8Data);
2000*53ee8cc1Swenshuai.xi error_window = u8Data;
2001*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F2E, &u8Data);
2002*53ee8cc1Swenshuai.xi error_window = (error_window << 8)|u8Data;
2003*53ee8cc1Swenshuai.xi }
2004*53ee8cc1Swenshuai.xi else
2005*53ee8cc1Swenshuai.xi {
2006*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x262F, &u8Data);
2007*53ee8cc1Swenshuai.xi error_window = u8Data;
2008*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x262E, &u8Data);
2009*53ee8cc1Swenshuai.xi error_window = (error_window << 8)|u8Data;
2010*53ee8cc1Swenshuai.xi }
2011*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MADISON)
2012*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2D2F, &u8Data);
2013*53ee8cc1Swenshuai.xi error_window = u8Data;
2014*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x2D2E, &u8Data);
2015*53ee8cc1Swenshuai.xi error_window = (error_window << 8)|u8Data;
2016*53ee8cc1Swenshuai.xi #elif (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MONACO || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MUJI || DMD_DTMB_CHIP_VERSION >= DMD_DTMB_CHIP_MONET)
2017*53ee8cc1Swenshuai.xi #if (DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MACAN || DMD_DTMB_CHIP_VERSION == DMD_DTMB_CHIP_MASERATI)
2018*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x162F, &u8Data);
2019*53ee8cc1Swenshuai.xi error_window = u8Data;
2020*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x162E, &u8Data);
2021*53ee8cc1Swenshuai.xi error_window = (error_window << 8)|u8Data;
2022*53ee8cc1Swenshuai.xi #else
2023*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F2F, &u8Data);
2024*53ee8cc1Swenshuai.xi error_window = u8Data;
2025*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x3F2E, &u8Data);
2026*53ee8cc1Swenshuai.xi error_window = (error_window << 8)|u8Data;
2027*53ee8cc1Swenshuai.xi #endif
2028*53ee8cc1Swenshuai.xi #else
2029*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x262F, &u8Data);
2030*53ee8cc1Swenshuai.xi error_window = u8Data;
2031*53ee8cc1Swenshuai.xi _MBX_ReadReg(0x262E, &u8Data);
2032*53ee8cc1Swenshuai.xi error_window = (error_window << 8)|u8Data;
2033*53ee8cc1Swenshuai.xi #endif
2034*53ee8cc1Swenshuai.xi
2035*53ee8cc1Swenshuai.xi #ifdef UTPA2
2036*53ee8cc1Swenshuai.xi *pBitErr = BitErr;
2037*53ee8cc1Swenshuai.xi *pError_window = error_window;
2038*53ee8cc1Swenshuai.xi #else
2039*53ee8cc1Swenshuai.xi *pber=(float)BitErr/7488.0/(float)error_window;
2040*53ee8cc1Swenshuai.xi #endif
2041*53ee8cc1Swenshuai.xi
2042*53ee8cc1Swenshuai.xi return TRUE;
2043*53ee8cc1Swenshuai.xi }
2044*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_GetReg(MS_U16 u16Addr,MS_U8 * pu8Data)2045*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_GetReg(MS_U16 u16Addr, MS_U8 *pu8Data)
2046*53ee8cc1Swenshuai.xi {
2047*53ee8cc1Swenshuai.xi return _MBX_ReadReg(u16Addr, pu8Data);
2048*53ee8cc1Swenshuai.xi }
2049*53ee8cc1Swenshuai.xi
_HAL_INTERN_DTMB_SetReg(MS_U16 u16Addr,MS_U8 u8Data)2050*53ee8cc1Swenshuai.xi static MS_BOOL _HAL_INTERN_DTMB_SetReg(MS_U16 u16Addr, MS_U8 u8Data)
2051*53ee8cc1Swenshuai.xi {
2052*53ee8cc1Swenshuai.xi return _MBX_WriteReg(u16Addr, u8Data);
2053*53ee8cc1Swenshuai.xi }
2054*53ee8cc1Swenshuai.xi
2055*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
2056*53ee8cc1Swenshuai.xi // Global Functions
2057*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
HAL_INTERN_DTMB_IOCTL_CMD(DMD_DTMB_HAL_COMMAND eCmd,void * pArgs)2058*53ee8cc1Swenshuai.xi MS_BOOL HAL_INTERN_DTMB_IOCTL_CMD(DMD_DTMB_HAL_COMMAND eCmd, void *pArgs)
2059*53ee8cc1Swenshuai.xi {
2060*53ee8cc1Swenshuai.xi MS_BOOL bResult = TRUE;
2061*53ee8cc1Swenshuai.xi
2062*53ee8cc1Swenshuai.xi switch(eCmd)
2063*53ee8cc1Swenshuai.xi {
2064*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_Exit:
2065*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_Exit();
2066*53ee8cc1Swenshuai.xi break;
2067*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_InitClk:
2068*53ee8cc1Swenshuai.xi _HAL_INTERN_DTMB_InitClk();
2069*53ee8cc1Swenshuai.xi break;
2070*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_Download:
2071*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_Download();
2072*53ee8cc1Swenshuai.xi break;
2073*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_FWVERSION:
2074*53ee8cc1Swenshuai.xi _HAL_INTERN_DTMB_FWVERSION();
2075*53ee8cc1Swenshuai.xi break;
2076*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_SoftReset:
2077*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_SoftReset();
2078*53ee8cc1Swenshuai.xi break;
2079*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_SetACICoef:
2080*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_SetACICoef();
2081*53ee8cc1Swenshuai.xi break;
2082*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_SetDTMBMode:
2083*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_SetDtmbMode();
2084*53ee8cc1Swenshuai.xi break;
2085*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_SetModeClean:
2086*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_SetModeClean();
2087*53ee8cc1Swenshuai.xi break;
2088*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_Set_QAM_SR:
2089*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_Set_QAM_SR();
2090*53ee8cc1Swenshuai.xi break;
2091*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_Active:
2092*53ee8cc1Swenshuai.xi break;
2093*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_AGCLock:
2094*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_AGCLock();
2095*53ee8cc1Swenshuai.xi break;
2096*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_DTMB_PNP_Lock:
2097*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_PNP_Lock();
2098*53ee8cc1Swenshuai.xi break;
2099*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_DTMB_FEC_Lock:
2100*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_FEC_Lock();
2101*53ee8cc1Swenshuai.xi break;
2102*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_DVBC_PreLock:
2103*53ee8cc1Swenshuai.xi break;
2104*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_DVBC_Main_Lock:
2105*53ee8cc1Swenshuai.xi break;
2106*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_GetModulation:
2107*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_GetModulation((DMD_DTMB_MODULATION_INFO *)pArgs);
2108*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_ReadIFAGC:
2109*53ee8cc1Swenshuai.xi *((MS_U16 *)pArgs) = _HAL_INTERN_DTMB_ReadIFAGC();
2110*53ee8cc1Swenshuai.xi break;
2111*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_ReadFrequencyOffset:
2112*53ee8cc1Swenshuai.xi #ifdef UTPA2
2113*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_ReadFrequencyOffset(&((*((DMD_DTMB_CFO_DATA *)pArgs)).fftfirstCfo), &((*((DMD_DTMB_CFO_DATA *)pArgs)).fftSecondCfo), &((*((DMD_DTMB_CFO_DATA *)pArgs)).sr));
2114*53ee8cc1Swenshuai.xi #else
2115*53ee8cc1Swenshuai.xi *((MS_S16 *)pArgs) = _HAL_INTERN_DTMB_ReadFrequencyOffset();
2116*53ee8cc1Swenshuai.xi #endif
2117*53ee8cc1Swenshuai.xi break;
2118*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_ReadSNRPercentage:
2119*53ee8cc1Swenshuai.xi *((MS_U8 *)pArgs) = _HAL_INTERN_DTMB_ReadSNRPercentage();
2120*53ee8cc1Swenshuai.xi break;
2121*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_GetPreLdpcBer:
2122*53ee8cc1Swenshuai.xi #ifdef UTPA2
2123*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_GetPreLdpcBer(&((*((DMD_DTMB_BER_DATA *)pArgs)).BitErr), &((*((DMD_DTMB_BER_DATA *)pArgs)).Error_window));
2124*53ee8cc1Swenshuai.xi #else
2125*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_GetPreLdpcBer((float *)pArgs);
2126*53ee8cc1Swenshuai.xi #endif
2127*53ee8cc1Swenshuai.xi break;
2128*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_GetPreViterbiBer:
2129*53ee8cc1Swenshuai.xi break;
2130*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_GetPostViterbiBer:
2131*53ee8cc1Swenshuai.xi break;
2132*53ee8cc1Swenshuai.xi // case DMD_DTMB_HAL_CMD_GetSNR:
2133*53ee8cc1Swenshuai.xi // break;
2134*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_TS_INTERFACE_CONFIG:
2135*53ee8cc1Swenshuai.xi break;
2136*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_IIC_Bypass_Mode:
2137*53ee8cc1Swenshuai.xi break;
2138*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_SSPI_TO_GPIO:
2139*53ee8cc1Swenshuai.xi break;
2140*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_GPIO_GET_LEVEL:
2141*53ee8cc1Swenshuai.xi break;
2142*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_GPIO_SET_LEVEL:
2143*53ee8cc1Swenshuai.xi break;
2144*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_GPIO_OUT_ENABLE:
2145*53ee8cc1Swenshuai.xi break;
2146*53ee8cc1Swenshuai.xi // case DMD_DTMB_HAL_CMD_DoIQSwap:
2147*53ee8cc1Swenshuai.xi // break;
2148*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_GET_REG:
2149*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_GetReg((*((DMD_DTMB_REG_DATA *)pArgs)).u16Addr, &((*((DMD_DTMB_REG_DATA *)pArgs)).u8Data));
2150*53ee8cc1Swenshuai.xi break;
2151*53ee8cc1Swenshuai.xi case DMD_DTMB_HAL_CMD_SET_REG:
2152*53ee8cc1Swenshuai.xi bResult = _HAL_INTERN_DTMB_SetReg((*((DMD_DTMB_REG_DATA *)pArgs)).u16Addr, (*((DMD_DTMB_REG_DATA *)pArgs)).u8Data);
2153*53ee8cc1Swenshuai.xi break;
2154*53ee8cc1Swenshuai.xi default:
2155*53ee8cc1Swenshuai.xi break;
2156*53ee8cc1Swenshuai.xi }
2157*53ee8cc1Swenshuai.xi
2158*53ee8cc1Swenshuai.xi return bResult;
2159*53ee8cc1Swenshuai.xi }
2160*53ee8cc1Swenshuai.xi
MDrv_DMD_DTMB_Initial_Hal_Interface(void)2161*53ee8cc1Swenshuai.xi MS_BOOL MDrv_DMD_DTMB_Initial_Hal_Interface(void)
2162*53ee8cc1Swenshuai.xi {
2163*53ee8cc1Swenshuai.xi return TRUE;
2164*53ee8cc1Swenshuai.xi }
2165*53ee8cc1Swenshuai.xi
2166