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Searched refs:BL2_LIMIT (Results 1 – 25 of 47) sorted by relevance

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/rk3399_ARM-atf/plat/nxp/soc-ls1028a/ls1028ardb/
H A Dplat_def.h47 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
50 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
52 #define BL2_TEXT_LIMIT (BL2_LIMIT)
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/lx2162aqds/
H A Dplat_def.h52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/lx2160ardb/
H A Dplat_def.h52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/lx2160aqds/
H A Dplat_def.h52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/plat/brcm/board/stingray/include/
H A Dplatform_def.h113 #define BL2_LIMIT (BL2_BASE + 0x40000) macro
119 #define BL2_LIMIT (BL2_BASE + 0x40000) macro
125 #define BL2_LIMIT (BRCM_BL_RAM_BASE + BRCM_BL_RAM_SIZE) macro
/rk3399_ARM-atf/plat/hisilicon/hikey960/include/
H A Dplatform_def.h62 #define BL2_LIMIT (BL2_BASE + 0x58000) /* 1AC5_8000 */ macro
67 #define BL31_BASE (BL2_LIMIT) /* 1AC5_8000 */
/rk3399_ARM-atf/bl2/
H A Dbl2.ld.S15 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
134 ASSERT(. <= BL2_LIMIT, "BL2 image has exceeded its limit.")
H A Dbl2_el3.ld.S19 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
228 ASSERT(. <= BL2_LIMIT, "BL2 image has exceeded its limit.")
/rk3399_ARM-atf/plat/qti/kodiak/rb3gen2/inc/
H A Dplatform_def.h17 #define BL2_LIMIT (BL2_BASE + BL2_SIZE) macro
/rk3399_ARM-atf/plat/nxp/soc-ls1043a/ls1043ardb/
H A Dplat_def.h44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/include/plat/nuvoton/common/
H A Dnpcm845x_arm_def.h445 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) macro
451 #define BL2_LIMIT BL1_RW_BASE macro
471 #define BL31_NOBITS_LIMIT BL2_LIMIT
521 #define BL2U_LIMIT BL2_LIMIT
/rk3399_ARM-atf/plat/renesas/common/include/
H A Dplatform_def.h109 #define BL2_LIMIT U(0xE6320000) macro
111 #define BL2_LIMIT U(0xE6360000) macro
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046afrwy/
H A Dplat_def.h44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046aqds/
H A Dplat_def.h44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046ardb/
H A Dplat_def.h44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/plat/arm/board/corstone1000/common/include/
H A Dplatform_def.h139 #define BL2_SIGNATURE_BASE (BL2_LIMIT - PLAT_ARM_MAX_BL2_SIZE)
140 #define BL2_BASE (BL2_LIMIT - \
143 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) macro
/rk3399_ARM-atf/plat/nxp/soc-ls1088a/ls1088ardb/
H A Dplat_def.h42 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/plat/nxp/soc-ls1088a/ls1088aqds/
H A Dplat_def.h42 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/rk3399_ARM-atf/plat/hisilicon/poplar/include/
H A Dpoplar_layout.h126 #define BL2_LIMIT (BL2_BASE + BL2_SIZE) macro
/rk3399_ARM-atf/bl2/aarch64/
H A Dbl2_el3_entrypoint.S19 #define FIXUP_SIZE ((BL2_LIMIT) - (BL2_BASE))
/rk3399_ARM-atf/plat/rpi/rpi3/include/
H A Dplatform_def.h190 #define BL2_BASE (BL2_LIMIT - PLAT_MAX_BL2_SIZE)
191 #define BL2_LIMIT BL31_BASE macro
/rk3399_ARM-atf/plat/socionext/uniphier/include/
H A Dplatform_def.h54 #define BL2_LIMIT (BL2_BASE + UNIPHIER_BL2_MAX_SIZE) macro
/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Dsocfpga_plat_def.h80 #define BL2_LIMIT (0xffe2b000) macro
/rk3399_ARM-atf/plat/hisilicon/hikey/include/
H A Dhikey_layout.h64 #define BL2_LIMIT (0xF9830000) /* 0xf983_0000 */ macro
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dsocfpga_plat_def.h80 #define BL2_LIMIT (0xffe1b000) macro

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