Home
last modified time | relevance | path

Searched refs:CLK_ISP (Results 1 – 21 of 21) sorted by relevance

/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drv1126-thunder-boot.dtsi57 <&cru CLK_ISP>, <&cru CLK_MIPICSI_OUT>,
H A Drv1126.dtsi816 <&cru CLK_ISP>,
1948 <&cru CLK_ISP>;
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dexynos3250.h333 #define CLK_ISP 35 macro
H A Dsprd,sc9863a-clk.h150 #define CLK_ISP 45 macro
H A Drv1126-cru.h162 #define CLK_ISP 95 macro
H A Drk3562-cru.h352 #define CLK_ISP 342 macro
H A Drk3568-cru.h275 #define CLK_ISP 212 macro
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drv1126-cru.h161 #define CLK_ISP 95 macro
H A Drk3562-cru.h352 #define CLK_ISP 342 macro
H A Drk3568-cru.h275 #define CLK_ISP 212 macro
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-exynos3250.c1033 GATE(CLK_ISP, "isp", "mout_aclk_266_sub",
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rv1126.c1714 case CLK_ISP: in rv1126_clk_get_rate()
1831 case CLK_ISP: in rv1126_clk_set_rate()
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3562.c972 COMPOSITE(CLK_ISP, "clk_isp", gpll_cpll_pvtpll_dmyapll_p, 0,
H A Dclk-rv1126.c950 MUX(CLK_ISP, "clk_isp", mux_clk_isp_p, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Dclk-rk3568.c1039 COMPOSITE(CLK_ISP, "clk_isp", cpll_gpll_hpll_p, 0,
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drv1126.dtsi623 <&cru CLK_ISP>,
1610 <&cru CLK_ISP>;
H A Drk3562.dtsi1211 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru CLK_ISP>;
H A Drk3568.dtsi1152 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru CLK_ISP>;
/OK3568_Linux_fs/kernel/drivers/clk/sprd/
H A Dsc9863a-clk.c819 [CLK_ISP] = &isp_clk.common.hw,
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3562.dtsi1707 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru CLK_ISP>;
H A Drk3568.dtsi1732 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru CLK_ISP>;