Searched defs:CONFIG_SYS_DDR_TIMING_2 (Results 1 – 25 of 30) sorted by relevance
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108 #define CONFIG_SYS_DDR_TIMING_2 ((8 << TIMING_CFG2_FOUR_ACT_SHIFT) | \ macro
144 #define CONFIG_SYS_DDR_TIMING_2 ((8 << TIMING_CFG2_FOUR_ACT_SHIFT) | \ macro
143 #define CONFIG_SYS_DDR_TIMING_2 (\ macro
112 #define CONFIG_SYS_DDR_TIMING_2 0x2f9048c8 macro125 #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ macro
91 #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ macro
168 #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
95 #define CONFIG_SYS_DDR_TIMING_2 0x14904CC8 macro
90 #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ macro
90 #define CONFIG_SYS_DDR_TIMING_2 ((0 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
110 #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
165 #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
123 #define CONFIG_SYS_DDR_TIMING_2 ((0 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
102 #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ macro
133 #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) |\ macro
115 #define CONFIG_SYS_DDR_TIMING_2 0x0fa880de macro
176 #define CONFIG_SYS_DDR_TIMING_2 ((0 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
155 #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
162 #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
138 #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
133 #define CONFIG_SYS_DDR_TIMING_2 0x002040c7 macro
198 #define CONFIG_SYS_DDR_TIMING_2 0x0FA8C8CF macro
156 #define CONFIG_SYS_DDR_TIMING_2 ((0 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
191 #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45, may need tuning */ macro
158 #define CONFIG_SYS_DDR_TIMING_2 ((0 << TIMING_CFG2_ADD_LAT_SHIFT) \ macro
101 #define CONFIG_SYS_DDR_TIMING_2 0x002888D0 macro