| a2c6e11d | 07-Mar-2025 |
Alexander Stein <alexander.stein@ew.tq-group.com> |
fix(imx8m): add RDC entries for all missing UARTs
Commit f7434fa13 ("fix(imx8m): ensure domain permissions for the console") sets RDC domain to Cortex-A only for console UART. But this only works if
fix(imx8m): add RDC entries for all missing UARTs
Commit f7434fa13 ("fix(imx8m): ensure domain permissions for the console") sets RDC domain to Cortex-A only for console UART. But this only works if there is an RDC configuration entry provided. Add missing RDC entries using the (reset) default value, so imx_rdc_console_access_enable() can actually configuration domain access.
Fixes: f7434fa13507 ("fix(imx8m): ensure domain permissions for the console") Change-Id: I550dbf2b53795ab43839139c455f2468442a3251 Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
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| f7434fa1 | 12-Sep-2024 |
Dario Binacchi <dario.binacchi@amarulasolutions.com> |
fix(imx8m): ensure domain permissions for the console
The commit d76f012ea8fc0 ("refactor(imx8m): replace magic number with enum type") also hardcodes the domain permissions configuration for the UA
fix(imx8m): ensure domain permissions for the console
The commit d76f012ea8fc0 ("refactor(imx8m): replace magic number with enum type") also hardcodes the domain permissions configuration for the UARTs, causing a regression for any board using a boot console different from UART2. Indeed, previously, the RDC_PDAP_UARTn registers were set to the reset value (0xff), meaning all domains were enabled for read and write access.
This patch fixes this regression by ensuring that the console always has read/write access enabled for domain 0.
Tested on a i.MX8MN BSH SMM S2 PRO board.
Fixes: d76f012ea8fc0 ("refactor(imx8m): replace magic number with enum type") Change-Id: I2670bf485372f32ef45cebb72a7694a9a800f417 Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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| 0324081a | 04-Mar-2024 |
Stefan Kerkmann <s.kerkmann@pengutronix.de> |
feat(imx8mp): restrict peripheral access to secure world
This restricts and locks all security relevant peripherals to only be changeable by the secure world. Otherwise the normal world can simply c
feat(imx8mp): restrict peripheral access to secure world
This restricts and locks all security relevant peripherals to only be changeable by the secure world. Otherwise the normal world can simply change the access settings and defeat all security measures put in place.
Change-Id: I248ef8dd67f1de7e528c3da456311bb138b77540 Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
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| cba7daa1 | 04-Mar-2024 |
Stefan Kerkmann <s.kerkmann@pengutronix.de> |
feat(imx8mp): set and lock almost all peripherals as non-secure
This sets and locks all peripheral type-1 masters, except CAAM, access as non-secure, so that they can't access secure world resources
feat(imx8mp): set and lock almost all peripherals as non-secure
This sets and locks all peripheral type-1 masters, except CAAM, access as non-secure, so that they can't access secure world resources from the normal world.
The CAAM itself is TrustZone aware and handles memory access between the normal world and the secure world on its own. Pinning it as non-secure access results in bus aborts if the secure memory region is protected by the TZASC380.
Change-Id: Iedf3d67481dc35d56aa7b291749b999a56d6e85e Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
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| 4827613c | 06-Sep-2023 |
Marco Felsch <m.felsch@pengutronix.de> |
fix(imx8m): map BL32 memory only if SPD_opteed or SPD_trusty is enabled
Always map the BL32 memory can interfere with the BL33 mapping if the BL33 is not aware of the mapping, e.g. different memory
fix(imx8m): map BL32 memory only if SPD_opteed or SPD_trusty is enabled
Always map the BL32 memory can interfere with the BL33 mapping if the BL33 is not aware of the mapping, e.g. different memory tagging secure/non-secure. Therefore map the memory only if BL32 (opteed, trusty) is enabled and BL33 is aware of this memory mapping.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Change-Id: I9c2bf78aa6e88c93e749a9248724186fee9df864
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