Home
last modified time | relevance | path

Searched refs:TOP_REG_BASE (Results 1 – 25 of 69) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBS.c134 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2388 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2390 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2392 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2401 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2402 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2403 …S(ULOGD("DEMOD",">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2), u8Da… in INTERN_DVBS_Config()
2529 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2531 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2543 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1414 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1436 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1447 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2155 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2157 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2327 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2329 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2331 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2333 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2335 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBS.c134 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2388 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2390 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2392 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2401 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2402 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2403 …S(ULOGD("DEMOD",">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2), u8Da… in INTERN_DVBS_Config()
2529 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2531 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2543 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1414 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1436 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1447 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2155 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2157 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2327 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2329 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2331 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2333 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2335 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBS.c134 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2233 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2235 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2237 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2246 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2247 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2248 …S(ULOGD("DEMOD",">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2), u8Da… in INTERN_DVBS_Config()
2374 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2376 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2388 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1364 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1386 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1397 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2105 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2107 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2277 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2279 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2281 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2283 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2285 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBS.c134 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2376 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2378 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2380 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2389 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2390 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2391 …S(ULOGD("DEMOD",">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2), u8Da… in INTERN_DVBS_Config()
2517 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2519 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2531 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1364 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1386 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1397 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2105 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2107 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2277 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2279 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2281 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2283 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2285 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBS.c134 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2376 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2378 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2380 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2389 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2390 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2391 …S(ULOGD("DEMOD",">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2), u8Da… in INTERN_DVBS_Config()
2517 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2519 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2531 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1364 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1386 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1397 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2105 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2107 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2277 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2279 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2281 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2283 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2285 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBS.c134 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2233 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2235 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2237 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2246 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2247 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2248 …S(ULOGD("DEMOD",">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2), u8Da… in INTERN_DVBS_Config()
2374 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2376 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2388 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1364 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1386 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1397 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2105 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2107 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2277 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2279 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2281 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2283 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2285 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBS.c134 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2233 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2235 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2237 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2246 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2247 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2248 …S(ULOGD("DEMOD",">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2), u8Da… in INTERN_DVBS_Config()
2374 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2376 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2388 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1364 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1386 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1397 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2105 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2107 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2277 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2279 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2281 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2283 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2285 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBS.c131 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2224 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2226 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2228 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2237 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2238 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2239 …DBG_INTERN_DVBS(printf(">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2… in INTERN_DVBS_Config()
2362 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2364 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2376 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1509 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1531 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1542 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2132 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd2, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2134 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd1, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2215 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2217 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2385 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2387 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2389 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBS.c131 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2392 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2394 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2396 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2405 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2406 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2407 …DBG_INTERN_DVBS(printf(">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2… in INTERN_DVBS_Config()
2530 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2532 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2544 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1311 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1333 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1344 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2021 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2023 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2191 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2193 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2195 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2197 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2199 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBS.c131 #define TOP_REG_BASE 0x2000 //DMDTOP macro
2423 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2425 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_Config()
2427 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_Config()
2436 MDrv_SYS_DMD_VD_MBX_WriteReg(TOP_REG_BASE + 0x60*2, u8Data); in INTERN_DVBS_Config()
2437 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0x60*2, &u8Data); in INTERN_DVBS_Config()
2438 …DBG_INTERN_DVBS(printf(">>>(while)REG read check: addr=%d value=%d<<<\n",(TOP_REG_BASE + 0x60*2… in INTERN_DVBS_Config()
2561 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
2563 MDrv_SYS_DMD_VD_MBX_WriteReg((TOP_REG_BASE + 0x60*2), u8Data); in INTERN_DVBS_BlindScan_Config()
2575 MDrv_SYS_DMD_VD_MBX_ReadReg((TOP_REG_BASE + 0x60*2), &u8Data); in INTERN_DVBS_BlindScan_Config()
[all …]
H A DhalDMD_INTERN_DVBC.c1315 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1337 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1348 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2025 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2027 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2195 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2197 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2199 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
2201 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3, &tmp); in INTERN_DVBC_info()
2203 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/
H A DhalDMD_INTERN_DVBC.c1770 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1792 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1803 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2415 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd2, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2417 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd1, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2502 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2504 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2674 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2676 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2678 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/
H A DhalDMD_INTERN_DVBC.c1749 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1771 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1782 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2371 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd2, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2373 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd1, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2457 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2459 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2627 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2629 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2631 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/
H A DhalDMD_INTERN_DVBC.c1775 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1797 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1808 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2396 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd2, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2398 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd1, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2482 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2484 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2652 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2654 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2656 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/
H A DhalDMD_INTERN_DVBC.c1756 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
1778 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
1789 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
2409 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd2, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2411 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xd1, &tmp); in INTERN_DVBC_GetCurrentSymbolRate()
2492 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
2494 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
2662 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0, &tmp); in INTERN_DVBC_info()
2664 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1, &tmp); in INTERN_DVBC_info()
2666 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2, &tmp); in INTERN_DVBC_info()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBC.c2782 u16Address = TOP_REG_BASE + 0xC3; //no channel, in INTERN_DVBC_GetLock()
2804 u16Address = TOP_REG_BASE + 0xC4; //ATV detection, in INTERN_DVBC_GetLock()
2815 u16Address = TOP_REG_BASE + 0xC4; //TR lock indicator, in INTERN_DVBC_GetLock()
3566 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC1, &tmp); in INTERN_DVBC_Version()
3568 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xC2, &tmp); in INTERN_DVBC_Version()
3778 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE0+BANK_BASE_OFFSET*hal_demod_swtich_status, &tmp); in INTERN_DVBC_info()
3780 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE1+BANK_BASE_OFFSET*hal_demod_swtich_status, &tmp); in INTERN_DVBC_info()
3782 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE2+BANK_BASE_OFFSET*hal_demod_swtich_status, &tmp); in INTERN_DVBC_info()
3784 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE3+BANK_BASE_OFFSET*hal_demod_swtich_status, &tmp); in INTERN_DVBC_info()
3786 MDrv_SYS_DMD_VD_MBX_ReadReg(TOP_REG_BASE + 0xE4+BANK_BASE_OFFSET*hal_demod_swtich_status, &tmp); in INTERN_DVBC_info()
[all …]

123