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Searched refs:SRDS_MAX_LANES (Results 1 – 25 of 26) sorted by relevance

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/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dls102xa_serdes.c11 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
35 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dfsl_ls1_serdes.c68 for (i = 0; i < SRDS_MAX_LANES; i++) { in serdes_get_first_lane()
90 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { in serdes_init()
/OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c64 } lanes[SRDS_MAX_LANES] = {
149 for (i = 0; i < SRDS_MAX_LANES; i++) { in __serdes_get_first_lane()
204 for (lane = first; lane < SRDS_MAX_LANES; lane++) { in __serdes_get_lane_count()
572 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { in fsl_serdes_init()
669 for (lane = 0; lane < SRDS_MAX_LANES; lane++) in fsl_serdes_init()
687 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dt1024_serdes.c13 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
48 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dt1040_serdes.c13 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
62 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dp4080_serdes.c14 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
76 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dp2041_serdes.c13 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
84 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dp5040_serdes.c20 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
95 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dfsl_corenet2_serdes.c161 for (i = 0; i < SRDS_MAX_LANES; i++) { in serdes_get_first_lane()
336 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { in serdes_init()
H A Dt2080_serdes.c16 u8 lanes[SRDS_MAX_LANES];
223 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dp5020_serdes.c13 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
129 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dp3041_serdes.c13 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
129 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Db4860_serdes.c15 u8 lanes[SRDS_MAX_LANES];
280 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dcmd_errata.c90 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { in check_erratum_a4580()
H A Dt4240_serdes.c15 u8 lanes[SRDS_MAX_LANES];
512 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dls1012a_serdes.c13 u8 lanes[SRDS_MAX_LANES];
68 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dls1043a_serdes.c13 u8 lanes[SRDS_MAX_LANES];
80 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dls1046a_serdes.c13 u8 lanes[SRDS_MAX_LANES];
93 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dfsl_lsch3_serdes.c80 for (i = 0; i < SRDS_MAX_LANES; i++) { in serdes_get_first_lane()
107 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { in serdes_init()
H A Dls2080a_serdes.c12 u8 lanes[SRDS_MAX_LANES];
118 for (i = 0; i < SRDS_MAX_LANES; i++) { in is_serdes_prtcl_valid()
H A Dfsl_lsch2_serdes.c68 for (i = 0; i < SRDS_MAX_LANES; i++) { in serdes_get_first_lane()
119 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { in serdes_init()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dconfig.h24 #define SRDS_MAX_LANES 8 macro
H A Dimmap_lsch2.h444 #define SRDS_MAX_LANES 4 macro
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dimmap_ls102xa.h296 #define SRDS_MAX_LANES 4 macro
/OK3568_Linux_fs/u-boot/board/freescale/b4860qds/
H A Db4860qds.c850 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { in config_serdes1_refclks()

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