1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2016 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <asm/arch/fsl_serdes.h>
9*4882a593Smuzhiyun #include <asm/arch/immap_lsch2.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun struct serdes_config {
12*4882a593Smuzhiyun u32 protocol;
13*4882a593Smuzhiyun u8 lanes[SRDS_MAX_LANES];
14*4882a593Smuzhiyun };
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun static struct serdes_config serdes1_cfg_tbl[] = {
17*4882a593Smuzhiyun /* SerDes 1 */
18*4882a593Smuzhiyun {0x3333, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
19*4882a593Smuzhiyun SGMII_FM1_DTSEC6} },
20*4882a593Smuzhiyun {0x1133, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC5,
21*4882a593Smuzhiyun SGMII_FM1_DTSEC6} },
22*4882a593Smuzhiyun {0x1333, {XFI_FM1_MAC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
23*4882a593Smuzhiyun SGMII_FM1_DTSEC6} },
24*4882a593Smuzhiyun {0x2333, {SGMII_2500_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
25*4882a593Smuzhiyun SGMII_FM1_DTSEC6} },
26*4882a593Smuzhiyun {0x2233, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
27*4882a593Smuzhiyun SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
28*4882a593Smuzhiyun {0x1040, {XFI_FM1_MAC9, NONE, QSGMII_FM1_A, NONE} },
29*4882a593Smuzhiyun {0x2040, {SGMII_2500_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE} },
30*4882a593Smuzhiyun {0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6} },
31*4882a593Smuzhiyun {0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1,
32*4882a593Smuzhiyun SGMII_FM1_DTSEC6} },
33*4882a593Smuzhiyun {0x3363, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6, PCIE1,
34*4882a593Smuzhiyun SGMII_FM1_DTSEC6} },
35*4882a593Smuzhiyun {0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
36*4882a593Smuzhiyun SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
37*4882a593Smuzhiyun {}
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static struct serdes_config serdes2_cfg_tbl[] = {
41*4882a593Smuzhiyun /* SerDes 2 */
42*4882a593Smuzhiyun {0x8888, {PCIE1, PCIE1, PCIE1, PCIE1} },
43*4882a593Smuzhiyun {0x5559, {PCIE1, PCIE2, PCIE3, SATA1} },
44*4882a593Smuzhiyun {0x5577, {PCIE1, PCIE2, PCIE3, PCIE3} },
45*4882a593Smuzhiyun {0x5506, {PCIE1, PCIE2, NONE, PCIE3} },
46*4882a593Smuzhiyun {0x0506, {NONE, PCIE2, NONE, PCIE3} },
47*4882a593Smuzhiyun {0x0559, {NONE, PCIE2, PCIE3, SATA1} },
48*4882a593Smuzhiyun {0x5A59, {PCIE1, SGMII_FM1_DTSEC2, PCIE3, SATA1} },
49*4882a593Smuzhiyun {0x5A06, {PCIE1, SGMII_FM1_DTSEC2, NONE, PCIE3} },
50*4882a593Smuzhiyun {}
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun static struct serdes_config *serdes_cfg_tbl[] = {
54*4882a593Smuzhiyun serdes1_cfg_tbl,
55*4882a593Smuzhiyun serdes2_cfg_tbl,
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
serdes_get_prtcl(int serdes,int cfg,int lane)58*4882a593Smuzhiyun enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct serdes_config *ptr;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
63*4882a593Smuzhiyun return 0;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun ptr = serdes_cfg_tbl[serdes];
66*4882a593Smuzhiyun while (ptr->protocol) {
67*4882a593Smuzhiyun if (ptr->protocol == cfg)
68*4882a593Smuzhiyun return ptr->lanes[lane];
69*4882a593Smuzhiyun ptr++;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
is_serdes_prtcl_valid(int serdes,u32 prtcl)75*4882a593Smuzhiyun int is_serdes_prtcl_valid(int serdes, u32 prtcl)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun int i;
78*4882a593Smuzhiyun struct serdes_config *ptr;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
81*4882a593Smuzhiyun return 0;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun ptr = serdes_cfg_tbl[serdes];
84*4882a593Smuzhiyun while (ptr->protocol) {
85*4882a593Smuzhiyun if (ptr->protocol == prtcl)
86*4882a593Smuzhiyun break;
87*4882a593Smuzhiyun ptr++;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (!ptr->protocol)
91*4882a593Smuzhiyun return 0;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun for (i = 0; i < SRDS_MAX_LANES; i++) {
94*4882a593Smuzhiyun if (ptr->lanes[i] != NONE)
95*4882a593Smuzhiyun return 1;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun return 0;
99*4882a593Smuzhiyun }
100