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Searched refs:FIELD_PREP (Results 1 – 25 of 323) sorted by relevance

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/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dphy-rockchip-samsung-hdptx.c536 FIELD_PREP(LN_TX_SER_40BIT_EN_RBR, 0x1)); in rockchip_hdptx_phy_set_voltage()
542 FIELD_PREP(LN_TX_SER_40BIT_EN_HBR, 0x1)); in rockchip_hdptx_phy_set_voltage()
549 FIELD_PREP(LN_TX_SER_40BIT_EN_HBR2, 0x1)); in rockchip_hdptx_phy_set_voltage()
555 FIELD_PREP(OVRD_LN_TX_DRV_LVL_CTRL, 0x1) | in rockchip_hdptx_phy_set_voltage()
556 FIELD_PREP(LN_TX_DRV_LVL_CTRL, in rockchip_hdptx_phy_set_voltage()
561 FIELD_PREP(OVRD_LN_TX_DRV_POST_LVL_CTRL, 0x1) | in rockchip_hdptx_phy_set_voltage()
562 FIELD_PREP(LN_TX_DRV_POST_LVL_CTRL, in rockchip_hdptx_phy_set_voltage()
568 FIELD_PREP(LN_ANA_TX_DRV_IDRV_IDN_CTRL, in rockchip_hdptx_phy_set_voltage()
570 FIELD_PREP(LN_ANA_TX_DRV_IDRV_IUP_CTRL, in rockchip_hdptx_phy_set_voltage()
572 FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_EN, in rockchip_hdptx_phy_set_voltage()
[all …]
H A Dphy-rockchip-naneng-edp.c105 FIELD_PREP(EDP_PHY_TX0_EMP, emp)); in rockchip_edp_phy_set_voltage()
108 FIELD_PREP(EDP_PHY_TX0_AMP, amp)); in rockchip_edp_phy_set_voltage()
111 FIELD_PREP(EDP_PHY_TX0_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
116 FIELD_PREP(EDP_PHY_TX1_EMP, emp)); in rockchip_edp_phy_set_voltage()
119 FIELD_PREP(EDP_PHY_TX1_AMP, amp)); in rockchip_edp_phy_set_voltage()
122 FIELD_PREP(EDP_PHY_TX1_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
127 FIELD_PREP(EDP_PHY_TX2_EMP, emp)); in rockchip_edp_phy_set_voltage()
130 FIELD_PREP(EDP_PHY_TX2_AMP, amp)); in rockchip_edp_phy_set_voltage()
133 FIELD_PREP(EDP_PHY_TX2_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
138 FIELD_PREP(EDP_PHY_TX3_EMP, emp)); in rockchip_edp_phy_set_voltage()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-samsung-hdptx.c536 FIELD_PREP(LN_TX_SER_40BIT_EN_RBR, 0x1)); in rockchip_hdptx_phy_set_voltage()
542 FIELD_PREP(LN_TX_SER_40BIT_EN_HBR, 0x1)); in rockchip_hdptx_phy_set_voltage()
549 FIELD_PREP(LN_TX_SER_40BIT_EN_HBR2, 0x1)); in rockchip_hdptx_phy_set_voltage()
555 FIELD_PREP(OVRD_LN_TX_DRV_LVL_CTRL, 0x1) | in rockchip_hdptx_phy_set_voltage()
556 FIELD_PREP(LN_TX_DRV_LVL_CTRL, in rockchip_hdptx_phy_set_voltage()
562 FIELD_PREP(OVRD_LN_TX_DRV_POST_LVL_CTRL, 0x1) | in rockchip_hdptx_phy_set_voltage()
563 FIELD_PREP(LN_TX_DRV_POST_LVL_CTRL, in rockchip_hdptx_phy_set_voltage()
570 FIELD_PREP(LN_ANA_TX_DRV_IDRV_IDN_CTRL, in rockchip_hdptx_phy_set_voltage()
572 FIELD_PREP(LN_ANA_TX_DRV_IDRV_IUP_CTRL, in rockchip_hdptx_phy_set_voltage()
574 FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_EN, in rockchip_hdptx_phy_set_voltage()
[all …]
H A Dphy-rockchip-naneng-edp.c111 FIELD_PREP(EDP_PHY_TX0_EMP, emp)); in rockchip_edp_phy_set_voltage()
114 FIELD_PREP(EDP_PHY_TX0_AMP, amp)); in rockchip_edp_phy_set_voltage()
117 FIELD_PREP(EDP_PHY_TX0_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
122 FIELD_PREP(EDP_PHY_TX1_EMP, emp)); in rockchip_edp_phy_set_voltage()
125 FIELD_PREP(EDP_PHY_TX1_AMP, amp)); in rockchip_edp_phy_set_voltage()
128 FIELD_PREP(EDP_PHY_TX1_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
133 FIELD_PREP(EDP_PHY_TX2_EMP, emp)); in rockchip_edp_phy_set_voltage()
136 FIELD_PREP(EDP_PHY_TX2_AMP, amp)); in rockchip_edp_phy_set_voltage()
139 FIELD_PREP(EDP_PHY_TX2_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
144 FIELD_PREP(EDP_PHY_TX3_EMP, emp)); in rockchip_edp_phy_set_voltage()
[all …]
/OK3568_Linux_fs/kernel/drivers/iio/adc/
H A Dstm32-dfsdm.h48 #define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v)
50 #define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v)
52 #define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v)
54 #define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v)
56 #define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v)
58 #define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v)
60 #define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v)
62 #define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v)
64 #define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v)
66 #define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v)
[all …]
/OK3568_Linux_fs/kernel/drivers/misc/habanalabs/include/gaudi/
H A Dgaudi_masks.h15 (FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \
16 (FIELD_PREP(DMA0_QM_GLBL_CFG0_CQF_EN_MASK, 0xF)) | \
17 (FIELD_PREP(DMA0_QM_GLBL_CFG0_CP_EN_MASK, 0xF)))
20 (FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \
21 (FIELD_PREP(DMA0_QM_GLBL_PROT_CQF_MASK, 0xF)) | \
22 (FIELD_PREP(DMA0_QM_GLBL_PROT_CP_MASK, 0xF)) | \
23 (FIELD_PREP(DMA0_QM_GLBL_PROT_ERR_MASK, 0x1)))
26 (FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \
27 (FIELD_PREP(DMA0_QM_GLBL_PROT_ERR_MASK, 0x1)))
30 (FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Dmax96755f.c28 FIELD_PREP(NUM_LANES, priv->num_lanes - 1)); in max96755f_mipi_dsi_rx_config()
49 dm_i2c_reg_write(priv->dev, 0x0385, FIELD_PREP(DPI_HSYNC_WIDTH_L, hsa)); in max96755f_mipi_dsi_rx_config()
50 dm_i2c_reg_write(priv->dev, 0x0386, FIELD_PREP(DPI_VYSNC_WIDTH_L, vsa)); in max96755f_mipi_dsi_rx_config()
52 FIELD_PREP(DPI_VSYNC_WIDTH_H, (vsa >> 8)) | in max96755f_mipi_dsi_rx_config()
53 FIELD_PREP(DPI_HSYNC_WIDTH_H, (hsa >> 8))); in max96755f_mipi_dsi_rx_config()
54 dm_i2c_reg_write(priv->dev, 0x03a5, FIELD_PREP(DPI_VFP_L, vfp)); in max96755f_mipi_dsi_rx_config()
56 FIELD_PREP(DPI_VBP_L, vbp) | in max96755f_mipi_dsi_rx_config()
57 FIELD_PREP(DPI_VFP_H, (vfp >> 8))); in max96755f_mipi_dsi_rx_config()
58 dm_i2c_reg_write(priv->dev, 0x03a7, FIELD_PREP(DPI_VBP_H, (vbp >> 4))); in max96755f_mipi_dsi_rx_config()
59 dm_i2c_reg_write(priv->dev, 0x03a8, FIELD_PREP(DPI_VACT_L, vact)); in max96755f_mipi_dsi_rx_config()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath11k/
H A Dhal_tx.c42 FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, ti->paddr); in ath11k_hal_tx_cmd_desc_setup()
44 FIELD_PREP(BUFFER_ADDR_INFO1_ADDR, in ath11k_hal_tx_cmd_desc_setup()
47 FIELD_PREP(BUFFER_ADDR_INFO1_RET_BUF_MGR, in ath11k_hal_tx_cmd_desc_setup()
49 FIELD_PREP(BUFFER_ADDR_INFO1_SW_COOKIE, ti->desc_id); in ath11k_hal_tx_cmd_desc_setup()
52 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_DESC_TYPE, ti->type) | in ath11k_hal_tx_cmd_desc_setup()
53 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_ENCAP_TYPE, ti->encap_type) | in ath11k_hal_tx_cmd_desc_setup()
54 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_ENCRYPT_TYPE, in ath11k_hal_tx_cmd_desc_setup()
56 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_SEARCH_TYPE, in ath11k_hal_tx_cmd_desc_setup()
58 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_ADDR_EN, in ath11k_hal_tx_cmd_desc_setup()
60 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_CMD_NUM, in ath11k_hal_tx_cmd_desc_setup()
[all …]
H A Dhal_rx.c16 hdr->info0 = FIELD_PREP(HAL_DESC_HDR_INFO0_OWNER, owner) | in ath11k_hal_reo_set_desc_hdr()
17 FIELD_PREP(HAL_DESC_HDR_INFO0_BUF_TYPE, buffer_type); in ath11k_hal_reo_set_desc_hdr()
20 hdr->info0 |= FIELD_PREP(HAL_DESC_HDR_INFO0_DBG_RESERVED, magic); in ath11k_hal_reo_set_desc_hdr()
28 tlv->tl = FIELD_PREP(HAL_TLV_HDR_TAG, HAL_REO_GET_QUEUE_STATS) | in ath11k_hal_reo_cmd_queue_stats()
29 FIELD_PREP(HAL_TLV_HDR_LEN, sizeof(*desc)); in ath11k_hal_reo_cmd_queue_stats()
40 desc->info0 = FIELD_PREP(HAL_REO_GET_QUEUE_STATS_INFO0_QUEUE_ADDR_HI, in ath11k_hal_reo_cmd_queue_stats()
61 tlv->tl = FIELD_PREP(HAL_TLV_HDR_TAG, HAL_REO_FLUSH_CACHE) | in ath11k_hal_reo_cmd_flush_cache()
62 FIELD_PREP(HAL_TLV_HDR_LEN, sizeof(*desc)); in ath11k_hal_reo_cmd_flush_cache()
73 desc->info0 = FIELD_PREP(HAL_REO_FLUSH_CACHE_INFO0_CACHE_ADDR_HI, in ath11k_hal_reo_cmd_flush_cache()
82 FIELD_PREP(HAL_REO_FLUSH_CACHE_INFO0_BLOCK_RESRC_IDX, in ath11k_hal_reo_cmd_flush_cache()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/amlogic/
H A Dphy-meson-g12a-usb2.c187 FIELD_PREP(PHY_CTRL_R16_MPLL_M, 20) | in phy_meson_g12a_usb2_init()
188 FIELD_PREP(PHY_CTRL_R16_MPLL_N, 1) | in phy_meson_g12a_usb2_init()
190 FIELD_PREP(PHY_CTRL_R16_MPLL_LOCK_LONG, 1) | in phy_meson_g12a_usb2_init()
196 FIELD_PREP(PHY_CTRL_R17_MPLL_FRAC_IN, 0) | in phy_meson_g12a_usb2_init()
197 FIELD_PREP(PHY_CTRL_R17_MPLL_LAMBDA1, 7) | in phy_meson_g12a_usb2_init()
198 FIELD_PREP(PHY_CTRL_R17_MPLL_LAMBDA0, 7) | in phy_meson_g12a_usb2_init()
199 FIELD_PREP(PHY_CTRL_R17_MPLL_FILTER_PVT2, 2) | in phy_meson_g12a_usb2_init()
200 FIELD_PREP(PHY_CTRL_R17_MPLL_FILTER_PVT1, 9)); in phy_meson_g12a_usb2_init()
202 value = FIELD_PREP(PHY_CTRL_R18_MPLL_LKW_SEL, 1) | in phy_meson_g12a_usb2_init()
203 FIELD_PREP(PHY_CTRL_R18_MPLL_LK_W, 9) | in phy_meson_g12a_usb2_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/crypto/ccree/
H A Dcc_hw_queue_defs.h224 pdesc->word[3] |= FIELD_PREP(WORD3_QUEUE_LAST_IND, 1); in set_queue_last_ind_bit()
242 pdesc->word[5] |= FIELD_PREP(WORD5_DIN_ADDR_HIGH, upper_32_bits(addr)); in set_din_type()
244 pdesc->word[1] |= FIELD_PREP(WORD1_DIN_DMA_MODE, dma_mode) | in set_din_type()
245 FIELD_PREP(WORD1_DIN_SIZE, size) | in set_din_type()
246 FIELD_PREP(WORD1_NS_BIT, axi_sec); in set_din_type()
260 pdesc->word[1] |= FIELD_PREP(WORD1_DIN_SIZE, size); in set_din_no_dma()
273 pdesc->word[1] |= FIELD_PREP(WORD1_DIN_SIZE, CC_CPP_DIN_SIZE); in set_cpp_crypto_key()
274 pdesc->word[1] |= FIELD_PREP(WORD1_LOCK_QUEUE, 1); in set_cpp_crypto_key()
276 pdesc->word[4] |= FIELD_PREP(WORD4_SETUP_OPERATION, slot); in set_cpp_crypto_key()
291 pdesc->word[1] |= FIELD_PREP(WORD1_DIN_SIZE, size) | in set_din_sram()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A Dmaxim-max96755f.c207 FIELD_PREP(MIPI_RX_RESET, 1)); in max96755f_mipi_dsi_rx_config()
210 FIELD_PREP(MIPI_RX_RESET, 0)); in max96755f_mipi_dsi_rx_config()
214 FIELD_PREP(NUM_LANES, ser->num_lanes - 1)); in max96755f_mipi_dsi_rx_config()
235 regmap_write(ser->regmap, 0x0385, FIELD_PREP(DPI_HSYNC_WIDTH_L, hsa)); in max96755f_mipi_dsi_rx_config()
236 regmap_write(ser->regmap, 0x0386, FIELD_PREP(DPI_VYSNC_WIDTH_L, vsa)); in max96755f_mipi_dsi_rx_config()
238 FIELD_PREP(DPI_VSYNC_WIDTH_H, (vsa >> 8)) | in max96755f_mipi_dsi_rx_config()
239 FIELD_PREP(DPI_HSYNC_WIDTH_H, (hsa >> 8))); in max96755f_mipi_dsi_rx_config()
240 regmap_write(ser->regmap, 0x03a5, FIELD_PREP(DPI_VFP_L, vfp)); in max96755f_mipi_dsi_rx_config()
242 FIELD_PREP(DPI_VBP_L, vbp) | in max96755f_mipi_dsi_rx_config()
243 FIELD_PREP(DPI_VFP_H, (vfp >> 8))); in max96755f_mipi_dsi_rx_config()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/meson/
H A Dmeson_overlay.c27 #define VD_HOLD_LINES(lines) FIELD_PREP(GENMASK(24, 19), lines)
29 #define VD_BYTES_PER_PIXEL(val) FIELD_PREP(GENMASK(15, 14), val)
36 #define CANVAS_ADDR2(addr) FIELD_PREP(GENMASK(23, 16), addr)
37 #define CANVAS_ADDR1(addr) FIELD_PREP(GENMASK(15, 8), addr)
38 #define CANVAS_ADDR0(addr) FIELD_PREP(GENMASK(7, 0), addr)
41 #define VD_X_START(value) FIELD_PREP(GENMASK(14, 0), value)
42 #define VD_X_END(value) FIELD_PREP(GENMASK(30, 16), value)
45 #define VD_Y_START(value) FIELD_PREP(GENMASK(12, 0), value)
46 #define VD_Y_END(value) FIELD_PREP(GENMASK(28, 16), value)
49 #define VD_COLOR_MAP(value) FIELD_PREP(GENMASK(1, 0), value)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7603/
H A Dinit.c27 [1] = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 0xf), in mt7603_set_tmac_template()
60 FIELD_PREP(MT_PSE_FRP_P0, 7) | in mt7603_dma_sched_init()
61 FIELD_PREP(MT_PSE_FRP_P1, 6) | in mt7603_dma_sched_init()
62 FIELD_PREP(MT_PSE_FRP_P2_RQ2, 4)); in mt7603_dma_sched_init()
122 (FIELD_PREP(MT_WF_RMAC_RMCR_SMPS_MODE, 3) | in mt7603_phy_init()
123 FIELD_PREP(MT_WF_RMAC_RMCR_RX_STREAMS, rx_chains))); in mt7603_phy_init()
152 FIELD_PREP(MT_AGG_LIMIT_AC(0), 24) | in mt7603_mac_init()
153 FIELD_PREP(MT_AGG_LIMIT_AC(1), 24) | in mt7603_mac_init()
154 FIELD_PREP(MT_AGG_LIMIT_AC(2), 24) | in mt7603_mac_init()
155 FIELD_PREP(MT_AGG_LIMIT_AC(3), 24)); in mt7603_mac_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/media/allegro-dvt/
H A Dallegro-mail.c94 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->height) | in allegro_encode_config_blob()
95 FIELD_PREP(GENMASK(15, 0), param->width); in allegro_encode_config_blob()
104 dst[i++] = FIELD_PREP(GENMASK(31, 24), codec) | in allegro_encode_config_blob()
105 FIELD_PREP(GENMASK(23, 8), param->constraint_set_flags) | in allegro_encode_config_blob()
106 FIELD_PREP(GENMASK(7, 0), param->profile); in allegro_encode_config_blob()
107 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->tier) | in allegro_encode_config_blob()
108 FIELD_PREP(GENMASK(15, 0), param->level); in allegro_encode_config_blob()
112 val |= FIELD_PREP(GENMASK(7, 4), param->log2_max_frame_num) | in allegro_encode_config_blob()
113 FIELD_PREP(GENMASK(3, 0), param->log2_max_poc); in allegro_encode_config_blob()
136 dst[i++] = FIELD_PREP(GENMASK(15, 8), param->beta_offset) | in allegro_encode_config_blob()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dusb_phy.c64 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) | in mt76x2u_phy_set_channel()
65 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) | in mt76x2u_phy_set_channel()
66 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2u_phy_set_channel()
67 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2u_phy_set_channel()
68 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)), in mt76x2u_phy_set_channel()
69 [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) | in mt76x2u_phy_set_channel()
70 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) | in mt76x2u_phy_set_channel()
71 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2u_phy_set_channel()
72 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2u_phy_set_channel()
73 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)), in mt76x2u_phy_set_channel()
[all …]
H A Dinit.c57 (FIELD_PREP(MT_PROT_CFG_RATE, 0x3) | \ in mt76_write_mac_initvals()
58 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
59 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
63 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
64 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
65 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
69 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
70 FIELD_PREP(MT_PROT_CFG_CTRL, 1) | \ in mt76_write_mac_initvals()
71 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
72 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x17)) in mt76_write_mac_initvals()
[all …]
H A Dpci_phy.c126 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) | in mt76x2_phy_set_channel()
127 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) | in mt76x2_phy_set_channel()
128 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2_phy_set_channel()
129 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2_phy_set_channel()
130 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)), in mt76x2_phy_set_channel()
131 [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) | in mt76x2_phy_set_channel()
132 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) | in mt76x2_phy_set_channel()
133 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2_phy_set_channel()
134 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2_phy_set_channel()
135 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)), in mt76x2_phy_set_channel()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-mediatek.c181 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
182 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
183 delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->tx_inv); in mt2712_set_delay()
185 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
186 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
187 delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
196 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
197 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
198 delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
200 delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
[all …]
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Dmeson-mx-sdhc-mmc.c148 send = FIELD_PREP(MESON_SDHC_SEND_CMD_INDEX, cmd->opcode); in meson_mx_sdhc_start_cmd()
152 send |= FIELD_PREP(MESON_SDHC_SEND_TOTAL_PACK, in meson_mx_sdhc_start_cmd()
222 FIELD_PREP(MESON_SDHC_CTRL_PACK_LEN, pack_len)); in meson_mx_sdhc_start_cmd()
316 FIELD_PREP(MESON_SDHC_CLK2_RX_CLK_PHASE, in meson_mx_sdhc_set_clk()
358 FIELD_PREP(MESON_SDHC_CTRL_DAT_TYPE, 0)); in meson_mx_sdhc_set_ios()
364 FIELD_PREP(MESON_SDHC_CTRL_DAT_TYPE, 1)); in meson_mx_sdhc_set_ios()
370 FIELD_PREP(MESON_SDHC_CTRL_DAT_TYPE, 2)); in meson_mx_sdhc_set_ios()
462 FIELD_PREP(MESON_SDHC_CLK2_RX_CLK_PHASE, in meson_mx_sdhc_execute_tuning()
502 FIELD_PREP(MESON_SDHC_CLK2_RX_CLK_PHASE, in meson_mx_sdhc_execute_tuning()
549 FIELD_PREP(MESON_SDHC_PDMA_PIO_RDRESP, idx)); in meson_mx_sdhc_read_response()
[all …]
H A Dsdhci-pci-gli.c125 wt_value |= FIELD_PREP(SDHCI_GLI_9750_WT_EN, GLI_9750_WT_EN_ON); in gl9750_wt_on()
142 wt_value |= FIELD_PREP(SDHCI_GLI_9750_WT_EN, GLI_9750_WT_EN_OFF); in gl9750_wt_off()
168 driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_1, in gli_set_9750()
170 driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2, in gli_set_9750()
177 sw_ctrl_value |= FIELD_PREP(SDHCI_GLI_9750_SW_CTRL_4, in gli_set_9750()
184 pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_INV, in gli_set_9750()
186 pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_DLY, in gli_set_9750()
192 misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_TX1_INV, in gli_set_9750()
194 misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV, in gli_set_9750()
196 misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_TX1_DLY, in gli_set_9750()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7615/
H A Dusb_sdio.c84 w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, rate->bw); in mt7663_usb_sdio_set_rates()
91 w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rate->bw) | in mt7663_usb_sdio_set_rates()
92 FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE, in mt7663_usb_sdio_set_rates()
98 FIELD_PREP(MT_WTBL_RIUCR1_RATE0, rate->probe_val) | in mt7663_usb_sdio_set_rates()
99 FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rate->val[0]) | in mt7663_usb_sdio_set_rates()
100 FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, rate->val[1])); in mt7663_usb_sdio_set_rates()
103 FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, rate->val[1] >> 8) | in mt7663_usb_sdio_set_rates()
104 FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rate->val[1]) | in mt7663_usb_sdio_set_rates()
105 FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rate->val[2]) | in mt7663_usb_sdio_set_rates()
106 FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, rate->val[2])); in mt7663_usb_sdio_set_rates()
[all …]
H A Dinit.c38 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | in mt7615_init_mac_chain()
39 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); in mt7615_init_mac_chain()
43 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) | in mt7615_init_mac_chain()
44 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT)); in mt7615_init_mac_chain()
47 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | in mt7615_init_mac_chain()
48 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | in mt7615_init_mac_chain()
49 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | in mt7615_init_mac_chain()
50 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | in mt7615_init_mac_chain()
51 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | in mt7615_init_mac_chain()
52 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | in mt7615_init_mac_chain()
[all …]
/OK3568_Linux_fs/kernel/drivers/memory/
H A Dstm32-fmc2-ebi.c195 u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR); in stm32_fmc2_ebi_check_waitcfg()
237 u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM); in stm32_fmc2_ebi_check_cpsize()
251 u32 bcr, bxtr, val = FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D); in stm32_fmc2_ebi_check_address_hold()
375 bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_SRAM); in stm32_fmc2_ebi_set_trans_type()
386 bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM); in stm32_fmc2_ebi_set_trans_type()
393 bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_SRAM); in stm32_fmc2_ebi_set_trans_type()
395 btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A); in stm32_fmc2_ebi_set_trans_type()
396 bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A); in stm32_fmc2_ebi_set_trans_type()
403 bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM); in stm32_fmc2_ebi_set_trans_type()
405 btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A); in stm32_fmc2_ebi_set_trans_type()
[all …]
/OK3568_Linux_fs/u-boot/drivers/i2c/muxes/
H A Dmax96755f.c21 FIELD_PREP(DIS_REM_CC, 0)); in max96755f_select()
33 FIELD_PREP(RESET_ONESHOT, 1) | in max96755f_select()
34 FIELD_PREP(AUTO_LINK, 0) | in max96755f_select()
35 FIELD_PREP(LINK_CFG, LINKA)); in max96755f_select()
40 FIELD_PREP(RESET_ONESHOT, 1) | in max96755f_select()
41 FIELD_PREP(AUTO_LINK, 0) | in max96755f_select()
42 FIELD_PREP(LINK_CFG, LINKB)); in max96755f_select()
55 FIELD_PREP(DIS_REM_CC, 1)); in max96755f_deselect()
74 FIELD_PREP(RESET_ALL, 1)); in max96755f_power_on()
81 FIELD_PREP(DIS_REM_CC, 1)); in max96755f_power_on()

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