1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Maxim max96755f GMSL2 Serializer with MIPI-DSI Input
4 *
5 * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
6 */
7
8 #include <drm/drm_atomic_helper.h>
9 #include <drm/drm_bridge.h>
10 #include <drm/drm_panel.h>
11 #include <drm/drm_print.h>
12 #include <drm/drm_of.h>
13 #include <drm/drm_connector.h>
14 #include <drm/drm_probe_helper.h>
15
16 #include <linux/gpio/consumer.h>
17 #include <linux/irq.h>
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/platform_device.h>
21 #include <linux/err.h>
22 #include <linux/extcon-provider.h>
23 #include <linux/of.h>
24 #include <linux/regmap.h>
25 #include <drm/drm_mipi_dsi.h>
26 #include <linux/mfd/max96755f.h>
27
28 struct max96755f_bridge {
29 struct drm_bridge bridge;
30 struct drm_bridge *next_bridge;
31 struct drm_connector connector;
32 struct drm_panel *panel;
33
34 struct device *dev;
35 struct max96755f *parent;
36 struct regmap *regmap;
37 struct mipi_dsi_device *dsi;
38 struct device_node *dsi_node;
39 struct drm_display_mode mode;
40 u32 num_lanes;
41 bool dv_swp_ab;
42 bool dpi_deskew_en;
43 bool split_mode;
44 bool bridge_dual_link;
45 u32 dsi_lane_map[4];
46
47 struct {
48 struct gpio_desc *gpio;
49 int irq;
50 bool irq_enabled;
51 atomic_t triggered;
52 } lock;
53 };
54
55 #define to_max96755f_bridge(x) container_of(x, struct max96755f_bridge, x)
56
max96755f_bridge_connector_get_modes(struct drm_connector * connector)57 static int max96755f_bridge_connector_get_modes(struct drm_connector *connector)
58 {
59 struct max96755f_bridge *ser = to_max96755f_bridge(connector);
60
61 if (ser->next_bridge)
62 return drm_bridge_get_modes(ser->next_bridge, connector);
63
64 return drm_panel_get_modes(ser->panel, connector);
65 }
66
67 static const struct drm_connector_helper_funcs
68 max96755f_bridge_connector_helper_funcs = {
69 .get_modes = max96755f_bridge_connector_get_modes,
70 };
71
72 static enum drm_connector_status
max96755f_bridge_connector_detect(struct drm_connector * connector,bool force)73 max96755f_bridge_connector_detect(struct drm_connector *connector, bool force)
74 {
75 struct max96755f_bridge *ser = to_max96755f_bridge(connector);
76
77 if (!drm_kms_helper_is_poll_worker())
78 return connector->status;
79
80 return drm_bridge_detect(&ser->bridge);
81 }
82
83 static const struct drm_connector_funcs max96755f_bridge_connector_funcs = {
84 .reset = drm_atomic_helper_connector_reset,
85 .fill_modes = drm_helper_probe_single_connector_modes,
86 .detect = max96755f_bridge_connector_detect,
87 .destroy = drm_connector_cleanup,
88 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
89 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
90 };
91
max96755f_attach_dsi(struct max96755f_bridge * max96755f,struct device_node * dsi_node)92 static struct mipi_dsi_device *max96755f_attach_dsi(struct max96755f_bridge *max96755f,
93 struct device_node *dsi_node)
94 {
95 const struct mipi_dsi_device_info info = { "max96755f", 0, NULL };
96 struct mipi_dsi_device *dsi;
97 struct mipi_dsi_host *host;
98 int ret;
99
100 host = of_find_mipi_dsi_host_by_node(dsi_node);
101 if (!host) {
102 dev_err(max96755f->dev, "failed to find dsi host\n");
103 return ERR_PTR(-EPROBE_DEFER);
104 }
105
106 dsi = mipi_dsi_device_register_full(host, &info);
107 if (IS_ERR(dsi)) {
108 dev_err(max96755f->dev, "failed to create dsi device\n");
109 return dsi;
110 }
111
112 dsi->lanes = max96755f->num_lanes;
113 dsi->format = MIPI_DSI_FMT_RGB888;
114 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
115
116 ret = mipi_dsi_attach(dsi);
117 if (ret < 0) {
118 dev_err(max96755f->dev, "failed to attach dsi to host\n");
119 mipi_dsi_device_unregister(dsi);
120 return ERR_PTR(ret);
121 }
122
123 return dsi;
124 }
125
max96755f_bridge_link_locked(struct max96755f_bridge * ser)126 static bool max96755f_bridge_link_locked(struct max96755f_bridge *ser)
127 {
128 u32 val;
129
130 if (regmap_read(ser->regmap, 0x0013, &val))
131 return false;
132
133 if (!FIELD_GET(LOCKED, val))
134 return false;
135
136 return true;
137 }
138
max96755f_bridge_attach(struct drm_bridge * bridge,enum drm_bridge_attach_flags flags)139 static int max96755f_bridge_attach(struct drm_bridge *bridge,
140 enum drm_bridge_attach_flags flags)
141 {
142 struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
143 struct drm_connector *connector = &ser->connector;
144 int ret;
145
146 ret = drm_of_find_panel_or_bridge(bridge->of_node, 1, -1, &ser->panel,
147 &ser->next_bridge);
148 if (ret)
149 return ret;
150
151 if (ser->next_bridge) {
152 ret = drm_bridge_attach(bridge->encoder, ser->next_bridge,
153 bridge, DRM_BRIDGE_ATTACH_NO_CONNECTOR);
154 if (ret)
155 return ret;
156 }
157
158 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
159 DRM_CONNECTOR_POLL_DISCONNECT;
160
161 drm_connector_helper_add(connector,
162 &max96755f_bridge_connector_helper_funcs);
163
164 ret = drm_connector_init(bridge->dev, connector,
165 &max96755f_bridge_connector_funcs,
166 ser->next_bridge ? ser->next_bridge->type : bridge->type);
167 if (ret) {
168 DRM_ERROR("Failed to initialize connector\n");
169 return ret;
170 }
171
172 if (max96755f_bridge_link_locked(ser)) {
173 connector->status = connector_status_connected;
174 enable_irq(ser->lock.irq);
175 ser->lock.irq_enabled = true;
176 } else {
177 connector->status = connector_status_disconnected;
178 }
179
180 drm_connector_attach_encoder(connector, bridge->encoder);
181
182 ser->dsi = max96755f_attach_dsi(ser, ser->dsi_node);
183 if (IS_ERR(ser->dsi))
184 return PTR_ERR(ser->dsi);
185
186 return 0;
187 }
188
max96755f_bridge_detach(struct drm_bridge * bridge)189 static void max96755f_bridge_detach(struct drm_bridge *bridge)
190 {
191 struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
192
193 if (ser->dsi) {
194 mipi_dsi_detach(ser->dsi);
195 mipi_dsi_device_unregister(ser->dsi);
196 }
197 }
198
max96755f_mipi_dsi_rx_config(struct max96755f_bridge * ser)199 static void max96755f_mipi_dsi_rx_config(struct max96755f_bridge *ser)
200 {
201 struct drm_display_mode *mode = &ser->mode;
202 u32 hfp, hsa, hbp, hact;
203 u32 vact, vsa, vfp, vbp;
204 u8 lane_map;
205
206 regmap_update_bits(ser->regmap, 0x330, MIPI_RX_RESET,
207 FIELD_PREP(MIPI_RX_RESET, 1));
208 mdelay(10);
209 regmap_update_bits(ser->regmap, 0x330, MIPI_RX_RESET,
210 FIELD_PREP(MIPI_RX_RESET, 0));
211 mdelay(10);
212
213 regmap_update_bits(ser->regmap, 0x331, NUM_LANES,
214 FIELD_PREP(NUM_LANES, ser->num_lanes - 1));
215
216 lane_map = (ser->dsi_lane_map[0] & 0xff) << 4 |
217 (ser->dsi_lane_map[1] & 0xff) << 6 |
218 (ser->dsi_lane_map[2] & 0xff) << 0 |
219 (ser->dsi_lane_map[3] & 0xff) << 2;
220 regmap_write(ser->regmap, 0x332, lane_map);
221
222 if (!ser->dpi_deskew_en)
223 return;
224
225 vact = mode->vdisplay;
226 vsa = mode->vsync_end - mode->vsync_start;
227 vfp = mode->vsync_start - mode->vdisplay;
228 vbp = mode->vtotal - mode->vsync_end;
229 hact = mode->hdisplay;
230 hsa = mode->hsync_end - mode->hsync_start;
231 hfp = mode->hsync_start - mode->hdisplay;
232 hbp = mode->htotal - mode->hsync_end;
233
234 regmap_write(ser->regmap, 0x03A4, 0xc1);
235 regmap_write(ser->regmap, 0x0385, FIELD_PREP(DPI_HSYNC_WIDTH_L, hsa));
236 regmap_write(ser->regmap, 0x0386, FIELD_PREP(DPI_VYSNC_WIDTH_L, vsa));
237 regmap_write(ser->regmap, 0x0387,
238 FIELD_PREP(DPI_VSYNC_WIDTH_H, (vsa >> 8)) |
239 FIELD_PREP(DPI_HSYNC_WIDTH_H, (hsa >> 8)));
240 regmap_write(ser->regmap, 0x03a5, FIELD_PREP(DPI_VFP_L, vfp));
241 regmap_write(ser->regmap, 0x03a6,
242 FIELD_PREP(DPI_VBP_L, vbp) |
243 FIELD_PREP(DPI_VFP_H, (vfp >> 8)));
244 regmap_write(ser->regmap, 0x03a7, FIELD_PREP(DPI_VBP_H, (vbp >> 4)));
245 regmap_write(ser->regmap, 0x03a8, FIELD_PREP(DPI_VACT_L, vact));
246 regmap_write(ser->regmap, 0x03a9, FIELD_PREP(DPI_VACT_H, (vact >> 8)));
247 regmap_write(ser->regmap, 0x03aa, FIELD_PREP(DPI_HFP_L, hfp));
248 regmap_write(ser->regmap, 0x03ab,
249 FIELD_PREP(DPI_HBP_L, hbp) |
250 FIELD_PREP(DPI_HFP_H, (hfp >> 7)));
251 regmap_write(ser->regmap, 0x03ac, FIELD_PREP(DPI_HBP_H, (hbp >> 4)));
252 regmap_write(ser->regmap, 0x03ad, FIELD_PREP(DPI_HACT_L, hact));
253 regmap_write(ser->regmap, 0x03ae, FIELD_PREP(DPI_HACT_H, (hact >> 8)));
254 }
255
max96755f_bridge_pre_enable(struct drm_bridge * bridge)256 static void max96755f_bridge_pre_enable(struct drm_bridge *bridge)
257 {
258 struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
259
260 max96755f_mipi_dsi_rx_config(ser);
261
262 if (ser->split_mode) {
263 regmap_update_bits(ser->regmap, 0x0053,
264 TX_SPLIT_MASK_B | TX_SPLIT_MASK_A | TX_STR_SEL,
265 FIELD_PREP(TX_SPLIT_MASK_B, 0) |
266 FIELD_PREP(TX_SPLIT_MASK_A, 1) |
267 FIELD_PREP(TX_STR_SEL, 0));
268 regmap_update_bits(ser->regmap, 0x0057,
269 TX_SPLIT_MASK_B | TX_SPLIT_MASK_A | TX_STR_SEL,
270 FIELD_PREP(TX_SPLIT_MASK_B, 1) |
271 FIELD_PREP(TX_SPLIT_MASK_A, 0) |
272 FIELD_PREP(TX_STR_SEL, 1));
273 regmap_update_bits(ser->regmap, 0x032a,
274 DV_SWP_AB | DV_CONV | DV_SPL | DV_EN,
275 FIELD_PREP(DV_SWP_AB, ser->dv_swp_ab) |
276 FIELD_PREP(DV_CONV, 1) |
277 FIELD_PREP(DV_SPL, 1) |
278 FIELD_PREP(DV_EN, 1));
279 }
280
281 if (ser->panel)
282 drm_panel_prepare(ser->panel);
283 }
284
max96755f_bridge_reset_oneshot(struct max96755f_bridge * ser)285 static void max96755f_bridge_reset_oneshot(struct max96755f_bridge *ser)
286 {
287 regmap_update_bits(ser->regmap, 0x0010, RESET_ONESHOT,
288 FIELD_PREP(RESET_ONESHOT, 1));
289
290 mdelay(100);
291 /* One-Shot Link Reset will trigger lock interrupt */
292 atomic_set(&ser->lock.triggered, 0);
293 }
294
max96755f_bridge_enable(struct drm_bridge * bridge)295 static void max96755f_bridge_enable(struct drm_bridge *bridge)
296 {
297 struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
298 struct max96755f *max96755f = ser->parent;
299 u32 val;
300 int ret;
301
302 if (ser->split_mode) {
303 regmap_update_bits(ser->regmap, 0x0311,
304 START_PORTAX | START_PORTAY,
305 FIELD_PREP(START_PORTAX, 1) |
306 FIELD_PREP(START_PORTAY, 1));
307 regmap_update_bits(ser->regmap, 0x0002,
308 VID_TX_EN_X | VID_TX_EN_Y,
309 FIELD_PREP(VID_TX_EN_X, 1) |
310 FIELD_PREP(VID_TX_EN_Y, 1));
311
312 regmap_update_bits(ser->regmap, 0x0010,
313 AUTO_LINK | LINK_CFG,
314 FIELD_PREP(AUTO_LINK, 0) |
315 FIELD_PREP(LINK_CFG, SPLITTER_MODE));
316 ret = regmap_read_poll_timeout(ser->regmap, 0x0013, val,
317 val & LOCKED, 100,
318 50 * USEC_PER_MSEC);
319 if (ret < 0)
320 dev_err(ser->dev, "GMSL2 link lock timeout\n");
321 } else {
322 regmap_update_bits(ser->regmap, 0x0311,
323 START_PORTAX | START_PORTAY,
324 FIELD_PREP(START_PORTAX, 1) |
325 FIELD_PREP(START_PORTAY, 1));
326 regmap_update_bits(ser->regmap, 0x02, VID_TX_EN_X,
327 FIELD_PREP(VID_TX_EN_X, 1));
328 if (ser->bridge_dual_link) {
329 regmap_update_bits(ser->regmap, 0x0010,
330 AUTO_LINK | LINK_CFG,
331 FIELD_PREP(AUTO_LINK, 0) |
332 FIELD_PREP(LINK_CFG, DUAL_LINK));
333 }
334 }
335
336 max96755f_bridge_reset_oneshot(ser);
337
338 if (ser->panel)
339 drm_panel_enable(ser->panel);
340
341 if (!ser->lock.irq_enabled) {
342 enable_irq(ser->lock.irq);
343 ser->lock.irq_enabled = true;
344 }
345
346 extcon_set_state_sync(max96755f->extcon, EXTCON_JACK_VIDEO_OUT, true);
347 }
348
max96755f_bridge_disable(struct drm_bridge * bridge)349 static void max96755f_bridge_disable(struct drm_bridge *bridge)
350 {
351 struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
352 struct max96755f *max96755f = ser->parent;
353
354 extcon_set_state_sync(max96755f->extcon, EXTCON_JACK_VIDEO_OUT, false);
355
356 if (ser->lock.irq_enabled) {
357 disable_irq(ser->lock.irq);
358 ser->lock.irq_enabled = false;
359 }
360
361 if (ser->panel)
362 drm_panel_disable(ser->panel);
363
364 regmap_update_bits(ser->regmap, 0x02, VID_TX_EN_X | VID_TX_EN_Y,
365 FIELD_PREP(VID_TX_EN_X, 0) |
366 FIELD_PREP(VID_TX_EN_Y, 0));
367
368 if (ser->split_mode || ser->bridge_dual_link)
369 regmap_update_bits(ser->regmap, 0x0010,
370 AUTO_LINK | LINK_CFG,
371 FIELD_PREP(AUTO_LINK, 1) |
372 FIELD_PREP(LINK_CFG, LINKA));
373 }
374
max96755f_bridge_post_disable(struct drm_bridge * bridge)375 static void max96755f_bridge_post_disable(struct drm_bridge *bridge)
376 {
377 struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
378
379 if (ser->panel)
380 drm_panel_unprepare(ser->panel);
381 }
382
383 static enum drm_connector_status
max96755f_bridge_detect(struct drm_bridge * bridge)384 max96755f_bridge_detect(struct drm_bridge *bridge)
385 {
386 struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
387 struct max96755f *max96755f = ser->parent;
388
389 if (!max96755f_bridge_link_locked(ser))
390 return connector_status_disconnected;
391
392 if (extcon_get_state(max96755f->extcon, EXTCON_JACK_VIDEO_OUT)) {
393 if (atomic_cmpxchg(&ser->lock.triggered, 1, 0))
394 return connector_status_disconnected;
395 } else {
396 atomic_set(&ser->lock.triggered, 0);
397 }
398
399 if (ser->next_bridge && (ser->next_bridge->ops & DRM_BRIDGE_OP_DETECT))
400 return drm_bridge_detect(ser->next_bridge);
401
402 return connector_status_connected;
403 }
404
max96755f_bridge_mode_set(struct drm_bridge * bridge,const struct drm_display_mode * mode,const struct drm_display_mode * adj_mode)405 static void max96755f_bridge_mode_set(struct drm_bridge *bridge,
406 const struct drm_display_mode *mode,
407 const struct drm_display_mode *adj_mode)
408 {
409 struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
410
411 drm_mode_copy(&ser->mode, adj_mode);
412 }
413
414 static const struct drm_bridge_funcs max96755f_bridge_funcs = {
415 .attach = max96755f_bridge_attach,
416 .detach = max96755f_bridge_detach,
417 .detect = max96755f_bridge_detect,
418 .pre_enable = max96755f_bridge_pre_enable,
419 .enable = max96755f_bridge_enable,
420 .disable = max96755f_bridge_disable,
421 .post_disable = max96755f_bridge_post_disable,
422 .mode_set = max96755f_bridge_mode_set,
423 .atomic_get_input_bus_fmts = drm_atomic_helper_bridge_propagate_bus_fmt,
424 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
425 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
426 .atomic_reset = drm_atomic_helper_bridge_reset,
427 };
428
max96755f_link_parse(struct max96755f_bridge * ser)429 static int max96755f_link_parse(struct max96755f_bridge *ser)
430 {
431 struct device *dev = ser->dev;
432 struct device_node *np = dev->of_node;
433 struct device *parent = dev->parent;
434 struct device_node *child;
435 u32 val;
436 int ret = 0;
437 unsigned int nr = 0;
438 int i, len;
439
440 ser->dpi_deskew_en = of_property_read_bool(np, "dpi-deskew-en");
441 ser->dv_swp_ab = of_property_read_bool(np, "vd-swap-ab");
442
443 if (!of_property_read_u32(np, "dsi,lanes", &val))
444 ser->num_lanes = val;
445 else
446 ser->num_lanes = 4;
447
448 for (i = 0; i < ser->num_lanes; i++)
449 ser->dsi_lane_map[i] = i;
450
451 if (of_find_property(np, "maxim,dsi-lane-map", &len)) {
452 len /= sizeof(u32);
453 if (ser->num_lanes != len) {
454 dev_err(dev, "invalid number of lane map\n");
455 return -EINVAL;
456 }
457
458 ret = of_property_read_u32_array(np, "maxim,dsi-lane-map",
459 ser->dsi_lane_map, len);
460 if (ret) {
461 dev_err(dev, "get dsi lane map failed\n");
462 return -EINVAL;
463 }
464 }
465
466 for_each_available_child_of_node(parent->of_node, child) {
467 if (!of_find_property(child, "reg", NULL))
468 continue;
469
470 nr++;
471 }
472
473 switch (nr) {
474 case 2:
475 ser->split_mode = true;
476 case 1:
477 break;
478 default:
479 ret = -EINVAL;
480 }
481
482 return ret;
483 }
484
max96755f_bridge_lock_irq_handler(int irq,void * arg)485 static irqreturn_t max96755f_bridge_lock_irq_handler(int irq, void *arg)
486 {
487 struct max96755f_bridge *ser = arg;
488
489 atomic_set(&ser->lock.triggered, 1);
490
491 return IRQ_HANDLED;
492 }
493
max96755f_bridge_probe(struct platform_device * pdev)494 static int max96755f_bridge_probe(struct platform_device *pdev)
495 {
496 struct device *dev = &pdev->dev;
497 struct device_node *np = dev->of_node;
498 struct max96755f_bridge *ser;
499 int ret;
500
501 ser = devm_kzalloc(dev, sizeof(*ser), GFP_KERNEL);
502 if (!ser)
503 return -ENOMEM;
504
505 ser->dev = dev;
506 ser->parent = dev_get_drvdata(dev->parent);
507 platform_set_drvdata(pdev, ser);
508
509 ser->regmap = dev_get_regmap(dev->parent, NULL);
510 if (!ser->regmap)
511 return dev_err_probe(dev, -ENODEV, "failed to get regmap\n");
512
513 ser->dsi_node = of_graph_get_remote_node(dev->of_node, 0, -1);
514 if (!ser->dsi_node) {
515 dev_err(ser->dev, "failed to get remote node for primary dsi\n");
516 return -ENODEV;
517 }
518
519 ret = max96755f_link_parse(ser);
520 if (ret)
521 dev_err_probe(dev, ret, "failed to parse link\n");
522
523 ser->lock.gpio = devm_gpiod_get(dev, "lock", GPIOD_IN);
524 if (IS_ERR(ser->lock.gpio))
525 return dev_err_probe(dev, PTR_ERR(ser->lock.gpio),
526 "failed to get lock GPIO\n");
527
528 ser->lock.irq = gpiod_to_irq(ser->lock.gpio);
529 if (ser->lock.irq < 0)
530 return ser->lock.irq;
531
532 irq_set_status_flags(ser->lock.irq, IRQ_NOAUTOEN);
533 ret = devm_request_threaded_irq(dev, ser->lock.irq, NULL,
534 max96755f_bridge_lock_irq_handler,
535 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
536 dev_name(dev), ser);
537 if (ret)
538 return dev_err_probe(dev, ret, "failed to request lock IRQ\n");
539
540 ser->bridge_dual_link = of_property_read_bool(np, "bridge_dual_link");
541
542 ser->bridge.funcs = &max96755f_bridge_funcs;
543 ser->bridge.of_node = dev->of_node;
544 ser->bridge.ops = DRM_BRIDGE_OP_DETECT;
545 ser->bridge.type = DRM_MODE_CONNECTOR_LVDS;
546
547 drm_bridge_add(&ser->bridge);
548
549 return 0;
550 }
551
max96755f_bridge_remove(struct platform_device * pdev)552 static int max96755f_bridge_remove(struct platform_device *pdev)
553 {
554 struct max96755f_bridge *ser = platform_get_drvdata(pdev);
555
556 drm_bridge_remove(&ser->bridge);
557
558 return 0;
559 }
560
561 static const struct of_device_id max96755f_bridge_of_match[] = {
562 { .compatible = "maxim,max96755f-bridge", },
563 {}
564 };
565 MODULE_DEVICE_TABLE(of, max96755f_bridge_of_match);
566
567 static struct platform_driver max96755f_bridge_driver = {
568 .driver = {
569 .name = "max96755f-bridge",
570 .of_match_table = of_match_ptr(max96755f_bridge_of_match),
571 },
572 .probe = max96755f_bridge_probe,
573 .remove = max96755f_bridge_remove,
574 };
575
576 module_platform_driver(max96755f_bridge_driver);
577
578 MODULE_AUTHOR("Guochun Huang <hero.hunag@rock-chips.com>");
579 MODULE_DESCRIPTION("Maxim max96755f GMSL2 Serializer with MIPI-DSI Input");
580 MODULE_LICENSE("GPL");
581