Searched +full:spi +full:- +full:hv (Results 1 – 25 of 59) sorted by relevance
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4 - compatible: Should contain one of the following:5 - "nvidia,tegra186-pmc": for Tegra1866 - "nvidia,tegra194-pmc": for Tegra1947 - "nvidia,tegra234-pmc": for Tegra2348 - reg: Must contain an (offset, length) pair of the register set for each9 entry in reg-names.10 - reg-names: Must include the following entries:11 - "pmc"12 - "wake"13 - "aotag"[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Thierry Reding <thierry.reding@gmail.com>11 - Jonathan Hunter <jonathanh@nvidia.com>16 - nvidia,tegra20-pmc17 - nvidia,tegra20-pmc18 - nvidia,tegra30-pmc19 - nvidia,tegra114-pmc[all …]
1 # SPDX-License-Identifier: GPL-2.012 @echo ' acpi - ACPI tools'13 @echo ' bpf - misc BPF tools'14 @echo ' cgroup - cgroup tools'15 @echo ' cpupower - a tool for all things x86 CPU power'16 @echo ' debugging - tools for debugging'17 @echo ' firewire - the userspace part of nosy, an IEEE-1394 traffic sniffer'18 @echo ' firmware - Firmware tools'19 @echo ' freefall - laptop accelerometer program for disk protection'20 @echo ' gpio - GPIO tools'[all …]
2 ------------------4 combines two or one 64-bit Power Architecture e5500 core respectively with high9 and general-purpose embedded computing. Its high level of integration offers14 - two e5500 cores, each with a private 256 KB L2 cache15 - Up to 1.4 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)16 - Three levels of instructions: User, supervisor, and hypervisor17 - Independent boot and reset18 - Secure boot capability19 - 256 KB shared L3 CoreNet platform cache (CPC)20 - Interconnect CoreNet platform[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later24 #include <linux/spi/spi.h>44 static phys_addr_t immrbase = -1;50 if (immrbase != -1) in get_immrbase()57 const __be32 *prop = of_get_property(soc, "#address-cells", &size); in get_immrbase()78 static u32 sysfreq = -1; in fsl_get_sys_freq()81 if (sysfreq != -1) in fsl_get_sys_freq()86 return -1; in fsl_get_sys_freq()88 of_property_read_u32(soc, "clock-frequency", &sysfreq); in fsl_get_sys_freq()89 if (sysfreq == -1 || !sysfreq) in fsl_get_sys_freq()[all …]
1 # SPDX-License-Identifier: GPL-2.057 # input before char - char/joystick depends on it. As does USB.67 source "drivers/spi/Kconfig"125 source "drivers/dma-buf/Kconfig"145 source "drivers/hv/Kconfig"
1 # SPDX-License-Identifier: GPL-2.06 # Rewritten to use lists instead of if-statements.9 obj-y += irqchip/10 obj-y += bus/12 obj-$(CONFIG_GENERIC_PHY) += phy/15 obj-$(CONFIG_PINCTRL) += pinctrl/16 obj-$(CONFIG_GPIOLIB) += gpio/17 obj-y += pwm/19 obj-y += pci/21 obj-$(CONFIG_PARISC) += parisc/[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * rt286.c -- RT286 ALSA SoC audio codec driver16 #include <linux/spi/spi.h>23 #include <sound/soc-dapm.h>196 snd_soc_component_write(component, rt286->index_cache[i].reg, in rt286_index_sync()197 rt286->index_cache[i].def); in rt286_index_sync()223 if (!rt286->component) in rt286_jack_detect()224 return -EINVAL; in rt286_jack_detect()226 dapm = snd_soc_component_get_dapm(rt286->component); in rt286_jack_detect()228 if (rt286->pdata.cbj_en) { in rt286_jack_detect()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * rt298.c -- RT298 ALSA SoC audio codec driver16 #include <linux/spi/spi.h>23 #include <sound/soc-dapm.h>200 snd_soc_component_write(component, rt298->index_cache[i].reg, in rt298_index_sync()201 rt298->index_cache[i].def); in rt298_index_sync()227 if (!rt298->component) in rt298_jack_detect()228 return -EINVAL; in rt298_jack_detect()230 dapm = snd_soc_component_get_dapm(rt298->component); in rt298_jack_detect()232 if (rt298->pdata.cbj_en) { in rt298_jack_detect()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.12 #define pr_fmt(fmt) "tegra-pmc: " fmt14 #include <linux/arm-smccc.h>16 #include <linux/clk-provider.h>18 #include <linux/clk/clk-conf.h>36 #include <linux/pinctrl/pinconf-generic.h>51 #include <dt-bindings/interrupt-controller/arm-gic.h>52 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>53 #include <dt-bindings/gpio/tegra186-gpio.h>[all …]
5 * SPDX-License-Identifier: GPL-2.0+16 * supported in u-boot */22 #include "keymile-common.h"32 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */41 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */45 /* Environment in SPI Flash */51 #define CONFIG_ENV_OFFSET 0x100000 /* 1MB for u-boot */113 * ... -------------------------------------------------------115 * ... |<------------------- pram -------------------------->|116 * ... -------------------------------------------------------[all …]
4 * SPDX-License-Identifier: GPL-2.0+41 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */55 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */185 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)191 /* Serial Port - controlled on board with jumper J8192 * open - index 2193 * shorted - index 1245 * eSPI - Enhanced SPI250 * Memory space is mapped 1-1, but I/O space must start from 0.428 #define CONFIG_CMDLINE_EDITING /* Command-line editing */[all …]
2 * Copyright 2011-2012 Freescale Semiconductor, Inc.4 * SPDX-License-Identifier: GPL-2.0+30 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */47 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */90 - CONFIG_ENV_SECT_SIZE)289 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \296 /* Serial Port - controlled on board with jumper J8297 * open - index 2298 * shorted - index 1343 * for slave u-boot IMAGE instored in master memory space,[all …]
2 * Copyright 2009-2012 Freescale Semiconductor, Inc.4 * SPDX-License-Identifier: GPL-2.0+48 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */64 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */100 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)298 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)304 /* Serial Port - controlled on board with jumper J8305 * open - index 2306 * shorted - index 1351 * for slave u-boot IMAGE instored in master memory space,[all …]
4 * SPDX-License-Identifier: GPL-2.0+25 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"43 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"60 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */77 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */159 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \166 /* Serial Port - controlled on board with jumper J8167 * open - index 2168 * shorted - index 1193 * Memory space is mapped 1-1, but I/O space must start from 0.[all …]
2 * Copyright 2013-2014 Freescale Semiconductor, Inc.20 * MA 02111-1307 USA38 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */61 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */92 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)260 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \363 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \370 /* Serial Port - controlled on board with jumper J8371 * open - index 2372 * shorted - index 1[all …]
4 * SPDX-License-Identifier: GPL-2.0+18 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */35 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"53 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"65 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"80 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"152 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)279 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \367 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \431 * for slave u-boot IMAGE instored in master memory space,[all …]
2 * Copyright 2011-2012 Freescale Semiconductor, Inc.4 * SPDX-License-Identifier: GPL-2.0+21 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"32 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"51 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */66 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */140 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)332 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \438 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \445 /* Serial Port - controlled on board with jumper J8[all …]
4 * SPDX-License-Identifier: GPL-2.0+15 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */34 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"52 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"64 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"79 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"103 /* PCIe Boot - Master */106 * for slave u-boot IMAGE instored in master memory space,134 /* PCIe Boot - Slave */170 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)[all …]
4 * SPDX-License-Identifier: GPL-2.0+15 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */37 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"55 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"71 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"90 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"118 /* PCIe Boot - Master */121 * for slave u-boot IMAGE instored in master memory space,149 /* PCIe Boot - Slave */193 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)[all …]
4 + * SPDX-License-Identifier: GPL-2.0+25 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"43 * with U-Boot image.53 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"84 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"118 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"148 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */171 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */200 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)374 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \[all …]
2 * Copyright 2011-2013 Freescale Semiconductor, Inc.4 * SPDX-License-Identifier: GPL-2.0+24 #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */41 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"59 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"75 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"94 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"166 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)315 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \419 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \[all …]
5 * Copyright 2002-2003 Rusty Russell, IBM Corporation14 #include "devicetable-offsets.h"69 typeof(((struct devid *)0)->f) f = TO_NATIVE(*(typeof(f) *)((m) + OFF_##devid##_##f))76 typeof(((struct devid *)0)->f) *v = ((m) + OFF_##devid##_##f)103 if (str[len - 1] != '*') in add_wildcard()111 sprintf(str + len, "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x", in add_uuid()120 * in .o file. If in-consistent then userspace and kernel does not agree141 if (*(uint8_t*)(symval+size-id_size+i)) { in device_id_check()147 *(uint8_t*)(symval+size-id_size+i) ); in device_id_check()190 "[%X-%X]", in do_usb_entry()[all …]
... ->__value) inptr - bytebuf > (state->__count & 7) curcs == db inend ...
1 .. SPDX-License-Identifier: GPL-2.04 The Definitive KVM (Kernel-based Virtual Machine) API Documentation13 - System ioctls: These query and set global attributes which affect the17 - VM ioctls: These query and set attributes that affect an entire virtual24 - vcpu ioctls: These query and set attributes that control the operation32 - device ioctls: These query and set attributes that control the operation80 facility that allows backward-compatible extensions to the API to be104 the ioctl returns -ENOTTY.122 -----------------------139 -----------------[all …]