include/configs/T4240RDB.h

4  * SPDX-License-Identifier:	GPL-2.0+
25 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
43 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
60 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
77 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
159 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
166 /* Serial Port - controlled on board with jumper J8
167  * open - index 2
168  * shorted - index 1
193  * Memory space is mapped 1-1, but I/O space must start from 0.
275 #define CONFIG_CMDLINE_EDITING			/* Command-line editing */
296 #define CONFIG_UBOOTPATH	"u-boot.bin"	/* U-Boot image on TFTP server*/
302 	"setenv bootargs config-addr=0x60000000; "	\
303 	"bootm 0x01000000 - 0x00f00000"
333 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
414 				| CSOR_NAND_ECC_MODE_4  /* 4-bit ECC */ \
541  * eSPI - Enhanced SPI
674  * T4240 has 3 DDR controllers. Default to 3-way interleaving. It can be
675  * 3way_1KB, 3way_4KB, 3way_8KB. T4160 has 2 DDR controllers. Default to 2-way
677  * See doc/README.fsl-ddr for details.
707 	"setenv bootargs config-addr=0x60000000; "	\
708 	"bootm 0x01000000 - 0x00f00000"
723 	"bootm $loadaddr - $fdtaddr"
732 	"bootm $loadaddr - $fdtaddr"