include/configs/T102xRDB.h

4  * SPDX-License-Identifier:     GPL-2.0+
15 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
37 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
55 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
71 #define CONFIG_SYS_LDSCRIPT		"arch/powerpc/cpu/mpc85xx/u-boot.lds"
90 #define CONFIG_SYS_LDSCRIPT		"arch/powerpc/cpu/mpc85xx/u-boot.lds"
118 /* PCIe Boot - Master */
121  * for slave u-boot IMAGE instored in master memory space,
149 /* PCIe Boot - Slave */
193 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
359 				| CSOR_NAND_ECC_MODE_4  /* 4-bit ECC */ \
368 				| CSOR_NAND_ECC_MODE_4	/* 4-bit ECC */ \
464 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
494  * disable empty flash sector detection, which is I/O-intensive.
523  * eSPI - Enhanced SPI
531  * Memory space is mapped 1-1, but I/O space must start from 0.
540 #define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
722  * space, the address can be mapped from slave TLB->slave LAW->
723  * slave SRIO or PCIE outbound window->master inbound window->
724  * master LAW->the ucode address in master's memory space.
767 			"128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot)," \
768 			"5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:" \
769 			"1m(uboot),5m(kernel),128k(dtb),-(user)"
782 #define CONFIG_CMDLINE_EDITING			/* Command-line editing */
803 #define CONFIG_UBOOTPATH	u-boot.bin /* U-Boot image on TFTP server */
852 	"bootm $loadaddr - $fdtaddr"