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Searched refs:TOP_CKG_HVD_432MHZ (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h495 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c3901 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h496 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c4057 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DregHVD_EX.h512 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c4031 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DregHVD_EX.h496 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c3942 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DregHVD_EX.h497 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c3992 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h495 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) macro
H A DhalHVD_EX.c3896 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DregHVD_EX.h512 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c4052 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DregHVD_EX.h496 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c4079 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DregHVD_EX.h495 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c4239 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h524 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) macro
H A DhalHVD_EX.c3995 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/
H A DregHVD_EX.h642 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c4942 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/
H A DregHVD_EX.h642 #define TOP_CKG_HVD_432MHZ BITS(4:2, 7) // for overclocking macro
H A DhalHVD_EX.c4927 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/
H A DhalHVD_EX.c5058 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_432MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()