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Searched refs:iomux (Results 1 – 25 of 75) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A Dcache.c43 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in v7_outer_cache_enable() local
61 val = readl(&iomux->gpr[11]); in v7_outer_cache_enable()
65 writel(val, &iomux->gpr[11]); in v7_outer_cache_enable()
/rk3399_rockchip-uboot/drivers/pinctrl/rockchip/
H A Dpinctrl-rockchip.h288 struct rockchip_iomux iomux[4]; member
300 .iomux = { \
313 .iomux = { \
328 .iomux = { \
345 .iomux = { \
362 .iomux = { \
383 .iomux = { \
402 .iomux = { \
428 .iomux = { \
450 .iomux = { \
[all …]
H A Dpinctrl-rk3036.c23 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk3036_set_mux()
27 mux_type = bank->iomux[iomux_num].type; in rk3036_set_mux()
28 reg = bank->iomux[iomux_num].offset; in rk3036_set_mux()
H A Dpinctrl-rk3188.c23 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk3188_set_mux()
27 mux_type = bank->iomux[iomux_num].type; in rk3188_set_mux()
28 reg = bank->iomux[iomux_num].offset; in rk3188_set_mux()
H A Dpinctrl-rockchip-core.c126 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_get_mux()
131 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_get_mux()
134 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_get_mux()
138 mux_type = bank->iomux[iomux_num].type; in rockchip_get_mux()
139 reg = bank->iomux[iomux_num].offset; in rockchip_get_mux()
168 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_verify_mux()
173 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { in rockchip_verify_mux()
207 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_set_mux()
227 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_set_mux()
229 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) in rockchip_set_mux()
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H A Dpinctrl-rk3128.c110 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk3128_set_mux()
114 mux_type = bank->iomux[iomux_num].type; in rk3128_set_mux()
115 reg = bank->iomux[iomux_num].offset; in rk3128_set_mux()
H A Dpinctrl-rk1808.c64 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk1808_set_mux()
66 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) in rk1808_set_mux()
72 mux_type = bank->iomux[iomux_num].type; in rk1808_set_mux()
73 reg = bank->iomux[iomux_num].offset; in rk1808_set_mux()
H A Dpinctrl-rk3368.c23 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk3368_set_mux()
27 mux_type = bank->iomux[iomux_num].type; in rk3368_set_mux()
28 reg = bank->iomux[iomux_num].offset; in rk3368_set_mux()
H A Dpinctrl-rk3288.c40 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk3288_set_mux()
44 mux_type = bank->iomux[iomux_num].type; in rk3288_set_mux()
45 reg = bank->iomux[iomux_num].offset; in rk3288_set_mux()
H A Dpinctrl-rk322x.c153 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk3228_set_mux()
157 mux_type = bank->iomux[iomux_num].type; in rk3228_set_mux()
158 reg = bank->iomux[iomux_num].offset; in rk3228_set_mux()
H A Dpinctrl-rk3399.c62 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk3399_set_mux()
66 mux_type = bank->iomux[iomux_num].type; in rk3399_set_mux()
67 reg = bank->iomux[iomux_num].offset; in rk3399_set_mux()
H A Dpinctrl-rv1108.c87 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rv1108_set_mux()
91 mux_type = bank->iomux[iomux_num].type; in rv1108_set_mux()
92 reg = bank->iomux[iomux_num].offset; in rv1108_set_mux()
/rk3399_rockchip-uboot/board/embest/mx6boards/
H A Dmx6boards.c379 struct iomuxc *iomux = (struct iomuxc *) in enable_lvds() local
381 setbits_le32(&iomux->gpr[2], in enable_lvds()
392 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in disable_lvds() local
400 clrbits_le32(&iomux->gpr[2], in disable_lvds()
462 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_display() local
492 writel(reg, &iomux->gpr[2]); in setup_display()
494 clrsetbits_le32(&iomux->gpr[3], in setup_display()
/rk3399_rockchip-uboot/doc/device-tree-bindings/pinctrl/
H A Drockchip,pinctrl.txt21 Required properties for iomux controller:
28 Optional properties for iomux controller:
30 as some SoCs carry parts of the iomux controller registers there.
33 Deprecated properties for iomux controller:
34 - reg: first element is the general register space of the iomux controller
41 - reg: register of the gpio bank (different than the iomux registerset)
/rk3399_rockchip-uboot/board/aristainetos/
H A Daristainetos-v2.c406 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in enable_lvds() local
466 writel(reg, &iomux->gpr[2]); in enable_lvds()
468 reg = readl(&iomux->gpr[3]); in enable_lvds()
472 writel(reg, &iomux->gpr[3]); in enable_lvds()
479 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in enable_spi_display() local
558 writel(reg, &iomux->gpr[2]); in enable_spi_display()
560 reg = readl(&iomux->gpr[3]); in enable_spi_display()
564 writel(reg, &iomux->gpr[3]); in enable_spi_display()
/rk3399_rockchip-uboot/board/engicam/icorem6/
H A Dicorem6.c149 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_display() local
185 writel(reg, &iomux->gpr[2]); in setup_display()
187 reg = readl(&iomux->gpr[3]); in setup_display()
191 writel(reg, &iomux->gpr[3]); in setup_display()
/rk3399_rockchip-uboot/board/boundary/nitrogen6x/
H A Dnitrogen6x.c480 struct iomuxc *iomux = (struct iomuxc *) in enable_lvds() local
482 u32 reg = readl(&iomux->gpr[2]); in enable_lvds()
484 writel(reg, &iomux->gpr[2]); in enable_lvds()
490 struct iomuxc *iomux = (struct iomuxc *) in enable_lvds_jeida() local
492 u32 reg = readl(&iomux->gpr[2]); in enable_lvds_jeida()
495 writel(reg, &iomux->gpr[2]); in enable_lvds_jeida()
758 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_display() local
794 writel(reg, &iomux->gpr[2]); in setup_display()
796 reg = readl(&iomux->gpr[3]); in setup_display()
801 writel(reg, &iomux->gpr[3]); in setup_display()
/rk3399_rockchip-uboot/board/technologic/ts4600/
H A DMakefile10 obj-y := iomux.o
/rk3399_rockchip-uboot/board/freescale/mx28evk/
H A DMakefile11 obj-y := iomux.o
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx7ulp/
H A DMakefile8 obj-y := soc.o clock.o iomux.o pcc.o scg.o
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A Dsoc.c688 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in gpr_init() local
691 writel(0xF00000CF, &iomux->gpr[4]); in gpr_init()
694 writel(0x77177717, &iomux->gpr[6]); in gpr_init()
695 writel(0x77177717, &iomux->gpr[7]); in gpr_init()
698 writel(0x007F007F, &iomux->gpr[6]); in gpr_init()
699 writel(0x007F007F, &iomux->gpr[7]); in gpr_init()
/rk3399_rockchip-uboot/board/ge/bx50v3/
H A Dbx50v3.c438 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_display_b850v3() local
468 &iomux->gpr[2]); in setup_display_b850v3()
470 clrbits_le32(&iomux->gpr[3], in setup_display_b850v3()
479 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_display_bx50v3() local
507 &iomux->gpr[2]); in setup_display_bx50v3()
509 clrsetbits_le32(&iomux->gpr[3], in setup_display_bx50v3()
/rk3399_rockchip-uboot/board/kosagi/novena/
H A Dvideo.c388 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_display_clock() local
421 &iomux->gpr[2]); in setup_display_clock()
423 clrsetbits_le32(&iomux->gpr[3], in setup_display_clock()
/rk3399_rockchip-uboot/board/freescale/mx6sabresd/
H A Dmx6sabresd.c407 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in disable_lvds() local
409 int reg = readl(&iomux->gpr[2]); in disable_lvds()
414 writel(reg, &iomux->gpr[2]); in disable_lvds()
489 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_display() local
531 writel(reg, &iomux->gpr[2]); in setup_display()
533 reg = readl(&iomux->gpr[3]); in setup_display()
538 writel(reg, &iomux->gpr[3]); in setup_display()
/rk3399_rockchip-uboot/board/freescale/mx6sabreauto/
H A Dmx6sabreauto.c472 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in disable_lvds() local
474 clrbits_le32(&iomux->gpr[2], in disable_lvds()
541 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_display() local
580 writel(reg, &iomux->gpr[2]); in setup_display()
582 reg = readl(&iomux->gpr[3]); in setup_display()
589 writel(reg, &iomux->gpr[3]); in setup_display()

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