| #
3fd22dcd |
| 01-Jul-2024 |
Ye Zhang <ye.zhang@rock-chips.com> |
pinctrl: rockchip: support rk3506 pinctrl and rmio
Change-Id: I535e327cc8ea157402b8c559c1ccde0dca185082 Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
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| #
6cfbca32 |
| 01-Nov-2023 |
Cody Xie <cody.xie@rock-chips.com> |
pinctrl: rockchip: Fix build error without DM_GPIO enabled
Change-Id: Id09a1152e08a4be387ba8fe5fde24f97890db34e Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
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| #
04b7ba5a |
| 01-Nov-2023 |
Cody Xie <cody.xie@rock-chips.com> |
pinctrl: rockchip: Fix crash when dm_gpio_lookup_name fails
Change-Id: Ib9d57df1c1e067120201b3626e830e6f09299437 Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
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| #
1e9d2e36 |
| 30-Oct-2023 |
Cody Xie <cody.xie@rock-chips.com> |
pinctrl: rockchip: Support "output-high/low" DT properties
Change-Id: I4ba763c92f65f342b7b97ddb48c9038b9146840e Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
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| #
4730583a |
| 24-Mar-2021 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add handle for IOMUX_L_SOURCE_PMU offset
Change-Id: Id330158f16606d1683de070a5694725d5deaba6b Signed-off-by: David Wu <david.wu@rock-chips.com>
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| #
d7965d03 |
| 26-Nov-2020 |
Joseph Chen <chenjh@rock-chips.com> |
pinctrl: rockchip: add SPL support
CONFIG_OF_LIVE is always available in SPL and U-Boot.
Use CONFIG_IS_ENABLED(OF_LIVE) to unwind as CONFIG_OF_LIVE in U-Boot and CONFIG_SPL_OF_LIVE in SPL.
Signed-
pinctrl: rockchip: add SPL support
CONFIG_OF_LIVE is always available in SPL and U-Boot.
Use CONFIG_IS_ENABLED(OF_LIVE) to unwind as CONFIG_OF_LIVE in U-Boot and CONFIG_SPL_OF_LIVE in SPL.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I980579d54850ca7655b464688ba9e6bd35f24250
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| #
8273b391 |
| 12-Nov-2020 |
Jianqun Xu <jay.xu@rock-chips.com> |
pinctrl: rockchip: a pin unrouted is invalid
Change-Id: I706b23277f33768fc7c8bcfd06e6417fe3e8a0db Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
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| #
b8d3e6ff |
| 19-Aug-2020 |
Jianqun Xu <jay.xu@rock-chips.com> |
pinctrl: rockchip: set mux route in core driver
Change-Id: Iccc880b150b1cea3cef9d2a84d14a0e82ce5c5cf Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
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| #
3624458a |
| 19-Aug-2020 |
Jianqun Xu <jay.xu@rock-chips.com> |
pinctrl: rockchip: put nr_pins to pinctrl info structure
Put the nr_pins information to pinctrl info structure, instead of calculating in probe.
Change-Id: I3af11d99ef4b0e30c306ebd99a2233cd0c6b97b5
pinctrl: rockchip: put nr_pins to pinctrl info structure
Put the nr_pins information to pinctrl info structure, instead of calculating in probe.
Change-Id: I3af11d99ef4b0e30c306ebd99a2233cd0c6b97b5 Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
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| #
5635c457 |
| 16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
UPSTREAM: pinctrl: rockchip: Also move common set_schmitter func into per Soc file
Only some Soc need Schmitter feature, so move the implementation into their own files.
Signed-off-by: David Wu <da
UPSTREAM: pinctrl: rockchip: Also move common set_schmitter func into per Soc file
Only some Soc need Schmitter feature, so move the implementation into their own files.
Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 79d16e45409f928c952b6935d695cd08f9db76b3) Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I41ede5737258292e27492e391cf9a981210e4a71
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| #
05a5688e |
| 16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
UPSTREAM: pinctrl: rockchip: Split the common set_pull() func into per Soc
As the common set_mux func(), implement the feature at the own file for each Soc.
Signed-off-by: David Wu <david.wu@rock-c
UPSTREAM: pinctrl: rockchip: Split the common set_pull() func into per Soc
As the common set_mux func(), implement the feature at the own file for each Soc.
Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 743a77373bfa22ca099b30d4ac88d95a2f98d1b6) Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ib0de627d3aee1759965d64852bcd287785538dc0
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| #
681441e6 |
| 16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
UPSTREAM: pinctrl: rockchip: Split the common set_drive() func into per Soc
As the common set_mux func(), implement the feature at the own file for each Soc.
Signed-off-by: David Wu <david.wu@rock-
UPSTREAM: pinctrl: rockchip: Split the common set_drive() func into per Soc
As the common set_mux func(), implement the feature at the own file for each Soc.
Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 625ab11fdae3daf346647aaba59abee804e34589) Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I07caae48cd4699aa7bbddf2edf7de6863c0a58c2
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| #
5f55bbd7 |
| 16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
UPSTREAM: pinctrl: rockchip: Split the common set_mux() into per Soc
Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux(
UPSTREAM: pinctrl: rockchip: Split the common set_mux() into per Soc
Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code.
Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 54e75702c48a9757e82cbe71176c0b5ddcf6a092) Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ifdfce706e9b1cbe94300d2bed91182033f23f301
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| #
8fa6c062 |
| 16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
UPSTREAM: pinctrl: rockchip: Add pull-pin-default param and remove unused param
Some Socs use the pull-pin-default config param, need to add it. And input-enable/disable config params are not necess
UPSTREAM: pinctrl: rockchip: Add pull-pin-default param and remove unused param
Some Socs use the pull-pin-default config param, need to add it. And input-enable/disable config params are not necessary, remove it.
Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 0a5cc3cac96dcbb1f31c9c2a3954dad702a543c1) Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Id7522a4fdd21d42d46c42e6f66b93985064fd9ab
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| #
49b3d5d5 |
| 12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
UPSTREAM: pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl
There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value
UPSTREAM: pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl
There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers.
Signed-off-by: David Wu <david.wu@rock-chips.com> (cherry picked from commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2) Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ibf0ba2d879904a06a2fb6722f5886a39c010a7f7
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| #
f2e4e921 |
| 02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
UPSTREAM: pinctrl: rockchip: Add common rockchip pinctrl driver
Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS.
Signed-off-by: David Wu <david.wu@
UPSTREAM: pinctrl: rockchip: Add common rockchip pinctrl driver
Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> (cherry picked from commit e7ae4cf27a6d5837cb5e868712cdaa61d3ceb5e0)
1. fix with error handle with pin with IOMUX_UNROUTED. 2. add get pin count operation 3. modify drivers/pinctrl/rockchip/Makefile
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Change-Id: I1a398c865eb9e9afc38c6aca5431b6546e7260a6
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