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Searched refs:CLK_SPI1_SEL_SHIFT (Results 1 – 18 of 18) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rv1106.h241 CLK_SPI1_SEL_SHIFT = 3, enumerator
242 CLK_SPI1_SEL_MASK = 0x3 << CLK_SPI1_SEL_SHIFT,
H A Dcru_rk3506.h203 CLK_SPI1_SEL_SHIFT = 14, enumerator
204 CLK_SPI1_SEL_MASK = 0x3 << CLK_SPI1_SEL_SHIFT,
H A Dcru_rv1126.h282 CLK_SPI1_SEL_SHIFT = 8, enumerator
283 CLK_SPI1_SEL_MASK = 1 << CLK_SPI1_SEL_SHIFT,
H A Dcru_rk3528.h249 CLK_SPI1_SEL_SHIFT = 10, enumerator
250 CLK_SPI1_SEL_MASK = 0x3 << CLK_SPI1_SEL_SHIFT,
H A Dcru_rk3562.h358 CLK_SPI1_SEL_SHIFT = 12, enumerator
359 CLK_SPI1_SEL_MASK = 0x3 << CLK_SPI1_SEL_SHIFT,
H A Dcru_rv1126b.h330 CLK_SPI1_SEL_SHIFT = 4, enumerator
331 CLK_SPI1_SEL_MASK = 0x3 << CLK_SPI1_SEL_SHIFT,
H A Dcru_rk3588.h253 CLK_SPI1_SEL_SHIFT = 4, enumerator
254 CLK_SPI1_SEL_MASK = 3 << CLK_SPI1_SEL_SHIFT,
H A Dcru_rk3568.h469 CLK_SPI1_SEL_SHIFT = 2, enumerator
470 CLK_SPI1_SEL_MASK = 3 << CLK_SPI1_SEL_SHIFT,
H A Dcru_rk3576.h316 CLK_SPI1_SEL_SHIFT = 0, enumerator
317 CLK_SPI1_SEL_MASK = 3 << CLK_SPI1_SEL_SHIFT,
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3506.c807 sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT; in rk3506_spi_get_rate()
859 (sel << CLK_SPI1_SEL_SHIFT) | in rk3506_spi_set_rate()
H A Dclk_rv1106.c572 sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT; in rv1106_spi_get_clk()
611 src_clk << CLK_SPI1_SEL_SHIFT); in rv1106_spi_set_clk()
H A Dclk_rk3528.c719 shift = CLK_SPI1_SEL_SHIFT; in rk3528_spi_get_clk()
764 shift = CLK_SPI1_SEL_SHIFT; in rk3528_spi_set_clk()
H A Dclk_rv1126b.c534 sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT; in rv1126b_spi_get_clk()
573 src_clk << CLK_SPI1_SEL_SHIFT); in rv1126b_spi_set_clk()
H A Dclk_rk3562.c746 shift = CLK_SPI1_SEL_SHIFT; in rk3562_spi_get_rate()
800 shift = CLK_SPI1_SEL_SHIFT; in rk3562_spi_set_rate()
H A Dclk_rk3588.c501 sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT; in rk3588_spi_get_clk()
550 src_clk << CLK_SPI1_SEL_SHIFT); in rk3588_spi_set_clk()
H A Dclk_rk3576.c541 sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT; in rk3576_spi_get_clk()
597 src_clk << CLK_SPI1_SEL_SHIFT); in rk3576_spi_set_clk()
H A Dclk_rk3568.c1096 sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT; in rk3568_spi_get_clk()
1142 src_clk << CLK_SPI1_SEL_SHIFT); in rk3568_spi_set_clk()
H A Dclk_rv1126.c874 CLK_SPI1_SEL_GPLL << CLK_SPI1_SEL_SHIFT | in rv1126_spi_set_clk()