Searched refs:CLK_SPI0_SEL_SHIFT (Results 1 – 18 of 18) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rv1103b.h | 223 CLK_SPI0_SEL_SHIFT = 2, enumerator
224 CLK_SPI0_SEL_MASK = 3 << CLK_SPI0_SEL_SHIFT,
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| H A D | cru_rv1106.h | 279 CLK_SPI0_SEL_SHIFT = 12, enumerator
280 CLK_SPI0_SEL_MASK = 0x3 << CLK_SPI0_SEL_SHIFT,
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| H A D | cru_rk3506.h | 194 CLK_SPI0_SEL_SHIFT = 8, enumerator
195 CLK_SPI0_SEL_MASK = 0x3 << CLK_SPI0_SEL_SHIFT,
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| H A D | cru_rv1126.h | 195 CLK_SPI0_SEL_SHIFT = 7, enumerator
196 CLK_SPI0_SEL_MASK = 1 << CLK_SPI0_SEL_SHIFT,
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| H A D | cru_rk3528.h | 269 CLK_SPI0_SEL_SHIFT = 13, enumerator
270 CLK_SPI0_SEL_MASK = 0x3 << CLK_SPI0_SEL_SHIFT,
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| H A D | cru_rv1126b.h | 332 CLK_SPI0_SEL_SHIFT = 2, enumerator
333 CLK_SPI0_SEL_MASK = 0x3 << CLK_SPI0_SEL_SHIFT,
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| H A D | cru_rk3588.h | 255 CLK_SPI0_SEL_SHIFT = 2, enumerator
256 CLK_SPI0_SEL_MASK = 3 << CLK_SPI0_SEL_SHIFT,
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| H A D | cru_rk3568.h | 471 CLK_SPI0_SEL_SHIFT = 0, enumerator
472 CLK_SPI0_SEL_MASK = 3 << CLK_SPI0_SEL_SHIFT,
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| H A D | cru_rk3576.h | 300 CLK_SPI0_SEL_SHIFT = 13, enumerator
301 CLK_SPI0_SEL_MASK = 3 << CLK_SPI0_SEL_SHIFT,
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rv1103b.c | 434 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rv1103b_spi_get_clk()
469 src_clk << CLK_SPI0_SEL_SHIFT); in rv1103b_spi_set_clk()
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| H A D | clk_rk3506.c | 802 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rk3506_spi_get_rate()
853 (sel << CLK_SPI0_SEL_SHIFT) | in rk3506_spi_set_rate()
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| H A D | clk_rv1106.c | 568 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rv1106_spi_get_clk()
607 src_clk << CLK_SPI0_SEL_SHIFT); in rv1106_spi_set_clk()
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| H A D | clk_rk3528.c | 713 shift = CLK_SPI0_SEL_SHIFT; in rk3528_spi_get_clk()
758 shift = CLK_SPI0_SEL_SHIFT; in rk3528_spi_set_clk()
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| H A D | clk_rv1126b.c | 530 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rv1126b_spi_get_clk()
569 src_clk << CLK_SPI0_SEL_SHIFT); in rv1126b_spi_set_clk()
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| H A D | clk_rk3588.c | 498 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rk3588_spi_get_clk()
545 src_clk << CLK_SPI0_SEL_SHIFT); in rk3588_spi_set_clk()
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| H A D | clk_rk3576.c | 537 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rk3576_spi_get_clk()
592 src_clk << CLK_SPI0_SEL_SHIFT); in rk3576_spi_set_clk()
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| H A D | clk_rk3568.c | 1093 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rk3568_spi_get_clk()
1137 src_clk << CLK_SPI0_SEL_SHIFT); in rk3568_spi_set_clk()
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| H A D | clk_rv1126.c | 360 CLK_SPI0_SEL_GPLL << CLK_SPI0_SEL_SHIFT | in rv1126_spi_set_pmuclk()
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