| /optee_os/core/arch/arm/plat-mediatek/ |
| H A D | platform_config.h | 31 #define CONSOLE_UART_BASE UART0_BASE macro
48 #define CONSOLE_UART_BASE UART0_BASE macro
62 #define CONSOLE_UART_BASE UART0_BASE macro
76 #define CONSOLE_UART_BASE UART0_BASE macro
90 #define CONSOLE_UART_BASE UART0_BASE macro
104 #define CONSOLE_UART_BASE UART0_BASE macro
118 #define CONSOLE_UART_BASE UART0_BASE macro
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| H A D | main.c | 17 CONSOLE_UART_BASE, SERIAL8250_UART_REG_SIZE);
39 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
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| /optee_os/core/arch/arm/plat-hikey/ |
| H A D | platform_config.h | 21 #define CONSOLE_UART_BASE PL011_UART3_BASE macro
23 #define CONSOLE_UART_BASE PL011_UART2_BASE macro
25 #define CONSOLE_UART_BASE PL011_UART0_BASE macro
35 #define CONSOLE_UART_BASE PL011_UART6_BASE macro
37 #define CONSOLE_UART_BASE PL011_UART5_BASE macro
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| /optee_os/core/arch/arm/plat-marvell/ |
| H A D | platform_config.h | 67 #define CONSOLE_UART_BASE PLAT_MARVELL_BOOT_UART_BASE macro
110 #define CONSOLE_UART_BASE PLAT_MARVELL_BOOT_UART_BASE macro
128 #define CONSOLE_UART_BASE PLAT_MARVELL_BOOT_UART_BASE macro
150 #define CONSOLE_UART_BASE PLAT_MARVELL_BOOT_UART_BASE macro
167 #define CONSOLE_UART_BASE PLAT_MARVELL_BOOT_UART_BASE macro
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| H A D | main.c | 61 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE,
91 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
94 mvebu_uart_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
97 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, in plat_console_init()
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| /optee_os/core/arch/arm/plat-vexpress/ |
| H A D | platform_config.h | 26 #define CONSOLE_UART_BASE UART1_BASE macro
51 #define CONSOLE_UART_BASE UART3_BASE macro
65 #define CONSOLE_UART_BASE UART1_BASE macro
81 #define CONSOLE_UART_BASE UART1_BASE macro
89 #define CONSOLE_UART_BASE SECURE_UART_BASE macro
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| /optee_os/core/arch/arm/plat-imx/ |
| H A D | main.c | 44 #ifdef CONSOLE_UART_BASE
45 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
102 #ifdef CONSOLE_UART_BASE in plat_console_init()
103 imx_uart_init(&console_data, CONSOLE_UART_BASE); in plat_console_init()
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| /optee_os/core/arch/arm/plat-sam/ |
| H A D | platform_config.h | 49 #define CONSOLE_UART_BASE (FLEXCOM3_BASE_ADDRESS + 0x200) macro
66 #define CONSOLE_UART_BASE AT91C_BASE_UART0 macro
68 #define CONSOLE_UART_BASE AT91C_BASE_UART1 macro
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| /optee_os/core/arch/arm/plat-rcar/ |
| H A D | platform_config.h | 45 #define CONSOLE_UART_BASE 0xE6E88000 macro
55 #define CONSOLE_UART_BASE 0xE6C50000 macro
57 #define CONSOLE_UART_BASE 0xE6540000 macro
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| /optee_os/core/arch/arm/plat-amlogic/ |
| H A D | main.c | 13 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE,
18 amlogic_uart_init(&console_data, CONSOLE_UART_BASE); in plat_console_init()
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| /optee_os/core/arch/arm/plat-d02/ |
| H A D | main.c | 16 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
21 hi16xx_uart_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
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| /optee_os/core/arch/arm/plat-rpi3/ |
| H A D | main.c | 38 CONSOLE_UART_BASE, SERIAL8250_UART_REG_SIZE);
44 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
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| /optee_os/core/arch/riscv/plat-sifive/ |
| H A D | main.c | 12 CONSOLE_UART_BASE, SIFIVE_UART_REG_SIZE);
18 sifive_uart_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
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| /optee_os/core/arch/arm/plat-rpi5/ |
| H A D | main.c | 11 CONSOLE_UART_BASE, PL011_REG_SIZE);
17 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, in plat_console_init()
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| /optee_os/core/arch/arm/plat-poplar/ |
| H A D | main.c | 19 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
25 pl011_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
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| /optee_os/core/arch/arm/plat-ti/ |
| H A D | platform_config.h | 29 #define CONSOLE_UART_BASE UART1_BASE macro
31 #define CONSOLE_UART_BASE UART3_BASE macro
69 #define CONSOLE_UART_BASE UART0_BASE macro
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| /optee_os/core/arch/arm/plat-aspeed/ |
| H A D | platform_config.h | 23 #define CONSOLE_UART_BASE UART5_BASE macro
34 #define CONSOLE_UART_BASE UART12_BASE macro
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| /optee_os/core/arch/arm/plat-hisilicon/ |
| H A D | main.c | 16 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
29 pl011_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
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| /optee_os/core/arch/arm/plat-corstone1000/ |
| H A D | main.c | 19 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
44 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ,
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| /optee_os/core/arch/arm/plat-totalcompute/ |
| H A D | main.c | 20 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
37 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, in plat_console_init()
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| /optee_os/core/arch/arm/plat-rzg/ |
| H A D | main.c | 14 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, SCIF_REG_SIZE);
33 scif_uart_init(&console_data, CONSOLE_UART_BASE); in plat_console_init()
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| /optee_os/core/arch/arm/plat-versal2/ |
| H A D | main.c | 26 ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_PGDIR_SIZE),
41 pl011_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
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| H A D | platform_config.h | 35 #define CONSOLE_UART_BASE UART1_BASE macro
38 #define CONSOLE_UART_BASE UART0_BASE macro
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| /optee_os/core/arch/arm/plat-uniphier/ |
| H A D | main.c | 18 ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_PGDIR_SIZE),
46 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in plat_console_init()
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| /optee_os/core/arch/arm/plat-automotive_rd/ |
| H A D | main.c | 20 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
52 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, in plat_console_init()
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