| #
55ab8f06 |
| 27-Feb-2024 |
Alvin Chang <alvinga@andestech.com> |
core: Refactor console_init() and introduce plat_console_init()
Since there are some cross-platform console drivers, we let console_init() be common code to have a chance to initialize those console
core: Refactor console_init() and introduce plat_console_init()
Since there are some cross-platform console drivers, we let console_init() be common code to have a chance to initialize those console drivers (e.g., semihosting console).
If the cross-platform console drivers are not configured to be compiled, plat_console_init() will be invoked to initialize platform-specific console driver.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
df913c6d |
| 02-Aug-2023 |
Alvin Chang <alvinga@andestech.com> |
core: arm: Rename primary_init_intc() to boot_primary_init_intc()
Since interrupt controllers are usually initialized in boot stage, rename primary_init_intc() to boot_primary_init_intc().
Signed-o
core: arm: Rename primary_init_intc() to boot_primary_init_intc()
Since interrupt controllers are usually initialized in boot stage, rename primary_init_intc() to boot_primary_init_intc().
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
ef50391e |
| 19-Jul-2023 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: rename interrupt controller functions
This commit renames interrupt controller function names to be more generic: - Rename main_init_gic() to primary_init_intc() - Rename secondary_init_gic()
core: rename interrupt controller functions
This commit renames interrupt controller function names to be more generic: - Rename main_init_gic() to primary_init_intc() - Rename secondary_init_gic() to secondary_init_intc()
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
0ee3f52e |
| 16-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: gic: factorize call to gic_init() or gic_init_base_addr()
Platforms call either gic_init() or gic_init_base_addr() depending on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This chang
drivers: gic: factorize call to gic_init() or gic_init_base_addr()
Platforms call either gic_init() or gic_init_base_addr() depending on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This change factorize this logic from gic_init() implementation and makes gic_init_base_addr() local to gic.c.
For that purpose functions gic_init_base_address() and gic_dt_get_irq() are moved inside gic.c source file. source file.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
67e55c51 |
| 16-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: define main interrupt controller data from its driver
All but one platforms define CPU core interrupt controller from their platform main.c source file next to its main interrupt handler. This
core: define main interrupt controller data from its driver
All but one platforms define CPU core interrupt controller from their platform main.c source file next to its main interrupt handler. This change factorize these implementation by moving the definition of the controller data instance straight in the controller driver source file. This change makes each controller driver to implement straight itr_core_handler() function, preventing a extra branch on interrupt execution. Interrupt controller driver initialization function now straight calls itr_core_init().
This changes treats case when CFG_CORE_WORKAROUND_ARM_NMFI is enable to not conflict with core/arch/arm/kernel/thread.c that already overrides itr_core_handler() weak implementation.
With this change, the main controller initialization function (gic_init(), gic_init_base_addr(), gic_cpu_init() and hfic_init()) no more gets the controller data as input argument.
As a consequence, definition of struct hfic_data and struct gic_data moves from their respective driver header file to the respective driver source file.
As a consequence, gic_dump() no more requires an argument.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
0e501a9b |
| 12-Apr-2022 |
Andrew Davis <afd@ti.com> |
plat: arm: fix refactor GIC initialization
Commit 60801696667d ("plat: arm: refactor GIC initialization") converts functions gic_init_base_addr() and gic_init() to take physical addresses instead of
plat: arm: fix refactor GIC initialization
Commit 60801696667d ("plat: arm: refactor GIC initialization") converts functions gic_init_base_addr() and gic_init() to take physical addresses instead of virtual, but only converts half the platforms. This causes boot failure on all the others.
Convert the rest here.
Fixes: 60801696667d ("plat: arm: refactor GIC initialization") Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> [jf: wrap lines >80 characters; cite commit using commonly used format] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
6d8430f9 |
| 27-Sep-2021 |
Usama Arif <usama.arif@arm.com> |
plat-totalcompute: add support for higher DRAM
The new 6GB DRAM bank starts at 0x8080000000.
Signed-off-by: Usama Arif <usama.arif@arm.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
49dbb9ef |
| 07-Jul-2021 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
plat-totalcompute: Add support for S-EL2 SPMC
This patch adds CFG_CORE_SEL2_SPMC support. Defines CFG_TZDRAM_START address with memory region reserved for SPMC. Adds secondary cpu boot request handl
plat-totalcompute: Add support for S-EL2 SPMC
This patch adds CFG_CORE_SEL2_SPMC support. Defines CFG_TZDRAM_START address with memory region reserved for SPMC. Adds secondary cpu boot request handler. Disables configuring GIC if SEL2 SPMC is enabled.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
37e9518e |
| 07-Jul-2021 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
core: arm: Total Compute platform support
Initial support for Total Compute platform[1] - defines tc0 platform configuration - enables CFG_ARM64_core by default - defines TZCDRAM_BASE
L
core: arm: Total Compute platform support
Initial support for Total Compute platform[1] - defines tc0 platform configuration - enables CFG_ARM64_core by default - defines TZCDRAM_BASE
Link: [1] https://community.arm.com/developer/tools-software/oss-platforms/w/docs/606/total-compute
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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