| #
6945b368 |
| 19-Sep-2024 |
Anil Kumar Reddy <areddy3@marvell.com> |
plat-marvell: Add support for CN20K SoCs
Add support for Octeon20(CN20K) SoCs from Marvell.
Only tested 64-bit mode with default configurations:
1. Build command
make PLATFORM=marvell-cn20ka
mak
plat-marvell: Add support for CN20K SoCs
Add support for Octeon20(CN20K) SoCs from Marvell.
Only tested 64-bit mode with default configurations:
1. Build command
make PLATFORM=marvell-cn20ka
make PLATFORM=marvell-cnf20ka
2. Passed xtest
Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
9115cdfa |
| 02-Aug-2023 |
Gowthami <gthiagarajan@marvell.com> |
plat-marvell: Add support for CN10K SoCs
Add support for CN10K SoCs from Marvell.
Only tested 64-bit mode with default configurations:
1. Build command
make PLATFORM=marvell-cn10ka
2. Pass
plat-marvell: Add support for CN10K SoCs
Add support for CN10K SoCs from Marvell.
Only tested 64-bit mode with default configurations:
1. Build command
make PLATFORM=marvell-cn10ka
2. Passed xtest
Signed-off-by: Gowthami <gthiagarajan@marvell.com>
Reviewed-by: Anil Kumar Reddy <areddy3@marvell.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
0d5c5128 |
| 14-Jul-2021 |
Anil Kumar Reddy <areddy3@marvell.com> |
plat-marvell: Add HUK support for OcteonTX2 Platforms
Added support for fetching Hardware Unique Key(HUK)
from the OcteonTX2 platform.
Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Reviewed
plat-marvell: Add HUK support for OcteonTX2 Platforms
Added support for fetching Hardware Unique Key(HUK)
from the OcteonTX2 platform.
Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Reviewed-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Reviewed-by: Bharat Bhushan <bbhushan2@marvell.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
show more ...
|
| #
e12b0e86 |
| 22-Jan-2021 |
Anil Kumar Reddy <areddy3@marvell.com> |
plat-marvell: Add support for OcteonTX2 CNF95xx and CN98xx
Add support for OcteonTX2 CNF95xx and CN98xx platforms
from Marvell.
Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Acked-by: Jerom
plat-marvell: Add support for OcteonTX2 CNF95xx and CN98xx
Add support for OcteonTX2 CNF95xx and CN98xx platforms
from Marvell.
Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
show more ...
|
| #
681a92d3 |
| 27-Oct-2020 |
Bharat Bhushan <bbhushan2@marvell.com> |
plat-marvell: Add support for OcteonTX2 CN96xx SoC
Add support for OcteonTX2 CN96xx SoC from Marvell.
Only tested 64-bit mode with default configurations:
1. Build command
make PLATFORM=marvell-o
plat-marvell: Add support for OcteonTX2 CN96xx SoC
Add support for OcteonTX2 CN96xx SoC from Marvell.
Only tested 64-bit mode with default configurations:
1. Build command
make PLATFORM=marvell-otx2t96
2. Passed xtest
Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com>
Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
show more ...
|
| #
4d15551b |
| 24-May-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-marvell: support generic RAM layout
Move default secure and non-secure OP-TEE memory locations from
platform_config.h to conf.mk using the generic_ram_layout.
Marvell platforms memory location
plat-marvell: support generic RAM layout
Move default secure and non-secure OP-TEE memory locations from
platform_config.h to conf.mk using the generic_ram_layout.
Marvell platforms memory location and cores number are not configurable.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
Acked-by: Kevin Peng <kevinp@marvell.com>
show more ...
|
| #
29e7629e |
| 03-May-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: move CFG_TEE_CORE_NB_CORE to conf.mk for various platforms
Update platforms d02, rcar, sam, hikey, mediatek, poplar, rpi3, sprd,
zynqmp and marvell.
These platforms no more defines CFG_ confi
core: move CFG_TEE_CORE_NB_CORE to conf.mk for various platforms
Update platforms d02, rcar, sam, hikey, mediatek, poplar, rpi3, sprd,
zynqmp and marvell.
These platforms no more defines CFG_ configuration directives as
NB_CORE was the last remaining one.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
show more ...
|
| #
f6bbec8e |
| 24-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: remove CFG_ prefix from CFG_TEE_LOAD_ADDR
TEE_LOAD_ADDR is now local to source files. It is set to CFG_TEE_LOAD_ADDR
value if defined only for the platforms that previously allowed build
to ov
core: remove CFG_ prefix from CFG_TEE_LOAD_ADDR
TEE_LOAD_ADDR is now local to source files. It is set to CFG_TEE_LOAD_ADDR
value if defined only for the platforms that previously allowed build
to override the value. Few platform did hardcod CFG_TEE_LOAD_ADDR, this
change preserve these configurations.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
6f4e40ab |
| 25-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: remove CFG_ prefix from CFG_SHMEM_START/_SIZE
Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configura
core: remove CFG_ prefix from CFG_SHMEM_START/_SIZE
Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configuration directive with the CFG_ prefix.
This change renames the CFG_SHMEM_xxx into TEE_SHMEM_xxx so that they
do not mess with the platform configuration directives. Yet, the old
CFG_SHMEM_START/SIZE directives can still be used by platform_config.h
to set TEE_SHMEM_START/SIZE if the platform supports it (i.e plat-stm).
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
247bea90 |
| 25-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: remove CFG_ prefix from TA_RAM_START/TA_RAM_SIZE
Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be config
core: remove CFG_ prefix from TA_RAM_START/TA_RAM_SIZE
Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configuration directive with the CFG_ prefix.
This change renames these macros so that they do not mess with the
platform configuration directives.
Old macro label New macro label
CFG_TA_RAM_START TA_RAM_START
CFG_TA_RAM_SIZE TA_RAM_SIZE
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
446cc62a |
| 25-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: remove CFG_ prefix from TEE_RAM_START/VA_SIZE/PH_SIZE
Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be c
core: remove CFG_ prefix from TEE_RAM_START/VA_SIZE/PH_SIZE
Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configuration directive with the CFG_ prefix.
This change renames these macros so that they do not mess with the
platform configuration directives.
Old macro label New macro label
CFG_TEE_RAM_START TEE_RAM_START
CFG_TEE_RAM_VA_SIZE TEE_RAM_VA_SIZE
CFG_TEE_RAM_PH_SIZE TEE_RAM_PH_SIZE
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
d8dfc2d1 |
| 25-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: split SDP memory CFG_ and non-CFG_ configuration directives
This change aim at removing definition of CFG_ directive (here related
to SDP) from the platform_config.h files.
CFG_TEE_SDP_MEM_BA
core: split SDP memory CFG_ and non-CFG_ configuration directives
This change aim at removing definition of CFG_ directive (here related
to SDP) from the platform_config.h files.
CFG_TEE_SDP_MEM_BASE/_SIZE is a generic configuration directive to
register a SDP memory.
Some platforms define a SDP test memory when SDP is enable. This SDP
memory is located at the end of the TA_RAM. Introduce platform settings
TEE_SDP_TEST_MEM_BASE/_SIZE to register a SDP test buffer, independently
from the generic CFG_TEE_SDP_MEM_BASE/_SIZE.
Platforms marvel, stm, ti and vexpress updated.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
1bb92983 |
| 15-Dec-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Add SPDX license identifiers
Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.
Generated by [2]:
spdxify.py --add-spdx optee_os/
The scancode tool [3] wa
Add SPDX license identifiers
Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.
Generated by [2]:
spdxify.py --add-spdx optee_os/
The scancode tool [3] was used to double check the license matching
code in the Python script. All the licenses detected by scancode are
either detected by spdxify.py, or have no SPDX identifier, or are false
matches.
Link: [1] https://spdx.org/licenses/
Link: [2] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Link: [3] https://github.com/nexB/scancode-toolkit
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
show more ...
|
| #
24bb7516 |
| 16-Nov-2017 |
wangwen <wangwen@marvell.com> |
plat-marvell: Add initial support for ARMADA3700
Only test 64bit mode with default configuration
1. Build command
make PLATFORM=marvell-armada3700
2. Pass xtest
Signed-off-by: wangwen <wangwen
plat-marvell: Add initial support for ARMADA3700
Only test 64bit mode with default configuration
1. Build command
make PLATFORM=marvell-armada3700
2. Pass xtest
Signed-off-by: wangwen <wangwen@marvell.comi>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Kevin Peng <kevinp@marvell.com>
show more ...
|
| #
8ae8c738 |
| 13-Oct-2017 |
Kevin Peng <kevinp@marvell.com> |
Add Marvell platform with initial support for ARMADA A7K & A8K
Only tested 64-bit mode with default configurations:
1. build command
make PLATFORM=marvell-armada7080 CFG_ARM64_core=y
2. Passed
Add Marvell platform with initial support for ARMADA A7K & A8K
Only tested 64-bit mode with default configurations:
1. build command
make PLATFORM=marvell-armada7080 CFG_ARM64_core=y
2. Passed xtest
Signed-off-by: Kevin Peng <kevinp@marvell.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
|